ch552: add optional bulk-transfer DEBUG endpoint mode and FPGA CTS gating - #420
ch552: add optional bulk-transfer DEBUG endpoint mode and FPGA CTS gating#420jthornblad wants to merge 8 commits into
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Instead of always enabling USB endpoints at boot we let the firmware or app that intend to receive data decide when to enable them. This allows a client to know when to send data after a reset.
On Windows, the go-serial library used in our client side apps discards USB serial number strings that contain characters other than '[0-9a-zA-Z_]'. We work around this by replacing '-' by '_' here.
To provide uniform behavior from a device app point of view we disable all USB IO before starting an app loaded from client. This makes an app start with disabled USB IO when loaded from client or flash.
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| // Check if Endpoint 2 (CDC) has received data | ||
| if (UsbEp2ByteCount) { | ||
| if (UsbEp2ByteCount && (gpio_p1_4_get() == 0)) { |
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This is good improvement, since we don't wait doing nothing until the FPGA is ready but can keep processing other stuff. The same check inside made inside the CH554UART1SendByte(), should we remove it So the contract becomes that one has to check for CTS, and then send the byte?
It does not hold for CH554UART1SendBuffer() however, which has to to the check..
I would also make a helper function looks something like,
bool fpga_uart_ready (
return gpio_p1_4_get() == 0;
}
to reduce at least three duplicate code parts in main.c
| inline void check_cts_stop(void) | ||
| { | ||
| if (uart_byte_count() >= 133) // UartRxBuf is filled to 95% or more | ||
| if (uart_byte_count() >= 209) // UartRxBuf is filled to 95% or more |
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Why specifically 95%? Feels like we will have 11 unused bytes.
Wouldn't it be enough with like 2 bytes, or maybe 8 bytes to be conservative?
dehanj
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This should probably be three commits, since it is three different things.
- Add BULK make flag to define BULK_TRANSFER, switching the DEBUG interface from interrupt to bulk endpoints (0 ms bInterval instead of 16 ms) - Add a bulk-only DebugDesc variant (23 bytes vs. 32) alongside the existing interrupt version, selected via #ifdef BULK_TRANSFER - Skip DebugCfgDesc/DebugReportDesc HID requests when built with BULK_TRANSFER, since the vendor-specific bulk interface has no HID report descriptor - Fold DEBUG_REPORT_DESC_SIZE into the interrupt/bulk #ifdef and correct it to match the actual descriptor size (was hardcoded to 34, actual size is 32); MAX_CFG_DESC_SIZE now derives from it instead of duplicating the constant
- Bump UART_RX_BUF_SIZE from 140 to 220 bytes - Update CTS stop threshold from 133 to 209 to match (95% of 220)
- Only forward buffered USB data (EP2 CDC, EP3 FIDO/CCID, EP4 DEBUG) to the UART when the FPGA asserts CTS (P1.4 low), preventing deadlocks when the FPGA isn't ready to receive
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