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Preserve full BAR layout across guest sizing#48

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jserv merged 2 commits intomasterfrom
fix-pci-bar
Apr 29, 2026
Merged

Preserve full BAR layout across guest sizing#48
jserv merged 2 commits intomasterfrom
fix-pci-bar

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@jserv jserv commented Apr 29, 2026

Summary by cubic

Keep the full PCI BAR layout (space, mem type, prefetch) intact across guest sizing and fix I/O BAR routing. Also switch pci_set_bar to a single layout bitmask for simpler, accurate BAR setup.

  • Bug Fixes

    • Preserve all non-address BAR flags on guest config writes to avoid dropping MEM_TYPE/PREFETCH.
    • Mask the address into space_dev[bar].base, preventing the SPACE_IO bit from corrupting the base and breaking first-port lookup.
  • Migration

    • Update calls to pci_set_bar(dev, bar, size, layout, io_fn); pass PCI_BASE_ADDRESS_* flags (e.g., MEMORY | MEM_TYPE_32).
    • Replace any internal use of bar_is_io_space[] with bar_layout[].
    • 64-bit BARs still require a paired adjacent slot; only 32-bit memory and I/O BARs are wired here.

Written for commit 833b3d0. Summary will update on new commits. Review in cubic

otischung and others added 2 commits April 29, 2026 03:26
This change updates pci_set_bar() to accept a single `layout` bitmask
instead of separate boolean flags, simplifying BAR configuration. The
new `layout` argument encodes I/O vs. memory space, 32-/64-bit decoding,
and prefetchable settings via standard PCI_BASE_ADDRESS_* macros.
Existing callers can now pass any combination of:
  - PCI_BASE_ADDRESS_SPACE_IO or PCI_BASE_ADDRESS_SPACE_MEMORY
  - PCI_BASE_ADDRESS_MEM_TYPE_32 or PCI_BASE_ADDRESS_MEM_TYPE_64
  - PCI_BASE_ADDRESS_MEM_PREFETCH
The function writes the full layout to the BAR, derives `bar_is_io_space`
from bit[0], and initializes the region with the provided callback.
Docstrings updated with Doxygen examples illustrating MMIO and port I/O.

BREAKING CHANGE: pci_set_bar() signature changed; call sites must be
updated to pass the new `layout` parameter rather than separate flags.
This replaces bar_is_io_space[6] with bar_layout[6] so the full
PCI_BASE_ADDRESS_* bitmask written by pci_set_bar() survives a guest BAR
write. Previously only bit 0 (space) was retained; MEM_TYPE and PREFETCH
bits were silently dropped on the first config-space probe, which meant
pci_set_bar()'s new `layout` parameter was a partial lie.

pci_config_bar() now restores all non-address bits via (bar_layout[bar]
& ~mask) and assigns space_dev[bar].base to the masked address only,
fixing a latent I/O BAR routing bug where the SPACE_IO bit in 'base'
made bus_find_dev() miss the first port.

Header parameter renamed is_io_space -> layout to match the
implementation, and the magic 0x1U mask in pci_set_bar() now uses the
standard PCI_BASE_ADDRESS_SPACE_IO constant.

64-bit BARs still need a paired adjacent slot for the upper dword; that
limitation is now documented in pci_set_bar().

Co-authored-by: Jim Huang <jserv@ccns.ncku.edu.tw>
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No issues found across 3 files

@jserv jserv merged commit 15d2974 into master Apr 29, 2026
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@jserv jserv deleted the fix-pci-bar branch April 29, 2026 00:58
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2 participants