pulp-platform · DiyouS · Jul 10, 2026 · Jul 23, 2026 · Jul 23, 2026 · Jul 25, 2026
diff --git a/Bender.lock b/Bender.lock
@@ -9,8 +9,8 @@ packages:
     - common_verification
     - tech_cells_generic
   common_cells:
-    revision: 9afda9abb565971649c2aa0985639c096f351171
-    version: 1.38.0
+    revision: 65881ba0300209f181ddd34a12a8a2e5df7c07c8
+    version: null
     source:
       Git: https://github.com/pulp-platform/common_cells.git
     dependencies:
@@ -23,10 +23,10 @@ packages:
       Git: https://github.com/pulp-platform/common_verification.git
     dependencies: []
   fpnew:
-    revision: bf2100ff68cf736c50b095169d87231a1fa3cc66
+    revision: 46cb33a4ce6b04b83ec38ebd288dd58a031a6390
     version: null
     source:
-      Git: https://github.com/Jayanth2209/cvfpu.git
+      Git: https://github.com/pulp-platform/cvfpu.git
     dependencies:
     - common_cells
     - fpu_div_sqrt_mvp
@@ -55,8 +55,8 @@ packages:
     - common_cells
     - tech_cells_generic
   tech_cells_generic:
-    revision: 7968dd6e6180df2c644636bc6d2908a49f2190cf
-    version: 0.2.13
+    revision: 3a3de73632a06826b1bd9c65a0a2e92b32016845
+    version: 0.2.14
     source:
       Git: https://github.com/pulp-platform/tech_cells_generic.git
     dependencies:

diff --git a/Bender.yml b/Bender.yml
@@ -3,17 +3,16 @@
 # SPDX-License-Identifier: Apache-2.0
 
 package:
-  name: spatz_core
+  name: spatz_vpu
   authors:
     - "Matheus Cavalcante <matheusd@iis.ee.ethz.ch>"
     - "Mattia Sinigaglia  <mattia.sinigaglia5@unibo.it>"
     - "Diyou Shen         <dishen@iis.ee.ethz.ch"
 
 dependencies:
-  riscv-dbg:          { git: "https://github.com/pulp-platform/riscv-dbg.git",          version: 0.7.0          }
-  common_cells:       { git: "https://github.com/pulp-platform/common_cells.git",       version: 1.28.0         }
-  FPnew:              { git: "https://github.com/Jayanth2209/cvfpu.git",               rev:     bf2100ff68cf736c50b095169d87231a1fa3cc66 }
-  tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13         }
+  common_cells:       { git: "https://github.com/pulp-platform/common_cells.git",       rev: master             }
+  FPnew:              { git: "https://github.com/pulp-platform/cvfpu.git",              rev: common-cells-v2    }
+  tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.14         }
   snitch:             { path: "hw/ip/snitch"                                                                    }
   reqrsp_interface:   { path: "hw/ip/reqrsp_interface"                                                          }
 
@@ -22,11 +21,12 @@ workspace:
 
 sources:
   ## hw/ip/spatz ##
-  - target: spatz
-    files:
+  - files:
     # Level 0
     - hw/ip/snitch/src/riscv_instr.sv
-    - hw/src/reorder_buffer.sv
+    - target: mempool
+      files:
+        - hw/src/reorder_buffer.sv
     - hw/src/rvv_pkg.sv
     # Level 1
     - hw/src/generated/spatz_pkg.sv

diff --git a/hw/import_cfg.py b/hw/import_cfg.py
@@ -1,4 +1,4 @@
 import sys
 try:
    import json5 as hjson  # prefer json5 for Snitch cluster JSON5 configs
 except ImportError:
@@ -9,33 +9,40 @@
     print("Usage: python script.py <config.hjson>")
     sys.exit(1)
 
-# get dir to which the output is exported
 script_dir = Path(__file__).parent
 
-# get path of config file
 cfg_source_path = Path(sys.argv[1])
 cfg_name = cfg_source_path.stem   # strip extension; apply_cfg.py appends .hjson
 
+SPATZ_KEYS = ['mempool', 'vlen', 'n_fpu', 'n_ipu', 'spatz_fpu', 'spatz_nports',
+              'double_bw', 'buf_fpu', 'rvf', 'rvd']
+
+DEFAULT_SPATZ_CFG = {
+    'mempool': False,
+    'vlen': 512,
+    'n_fpu': 4,
+    'n_ipu': 1,
+    'spatz_fpu': True,
+    'spatz_nports': 4,
+    'double_bw': False,
+    'buf_fpu': 1,
+    'rvf': True,
+    'rvd': True,
+}
+
 with open(cfg_source_path, "r") as f:
     data = hjson.load(f)
-
-# copy only relevant information
-spatz_cfg = {'spatz': {}}
-keys = ['mempool', 'vlen', 'n_fpu', 'n_ipu', 'spatz_fpu', 'spatz_nports', 'double_bw', 'buf_fpu', 'rvf', 'rvd']
 
-for k in keys:
-    if k in data['cluster']:
-        spatz_cfg['spatz'][k] = data['cluster'][k]
+cfg = data.get('spatz')
+if not cfg:
+    print(f"[import_cfg] Warning: '{cfg_source_path}' carries no (or an "
+          f"empty) 'spatz' configuration; falling back to defaults.",
+          file=sys.stderr)
+    cfg = DEFAULT_SPATZ_CFG
 
+spatz_cfg = {'spatz': {k: cfg[k] for k in SPATZ_KEYS if k in cfg}}
 
-# dump output into cfg folder (always .hjson so apply_cfg.py can find it)
 cfg_dest_path = script_dir / 'cfg' / (cfg_name + '.hjson')
 cfg_dest_path.parent.mkdir(parents=True, exist_ok=True)
 with open(cfg_dest_path, "w") as f:
     hjson.dump(spatz_cfg, f)
-
-
-
-
-
-
diff --git a/hw/ip/snitch/src/riscv_instr.sv b/hw/ip/snitch/src/riscv_instr.sv
diff --git a/hw/src/generated/spatz_pkg.sv b/hw/src/generated/spatz_pkg.sv
@@ -9,7 +9,7 @@
 package spatz_pkg;
 
   import rvv_pkg::*;
-  import cf_math_pkg::idx_width;
+  import cc_pkg::idx_width;
 
   //////////////////
   //  Parameters  //

diff --git a/hw/src/reorder_buffer.sv b/hw/src/reorder_buffer.sv
@@ -9,7 +9,7 @@
 // must be indexed with an ID that identifies it within the ROB.
 
 module reorder_buffer
-  import cf_math_pkg::idx_width;
+  import cc_pkg::idx_width;
 #(
   parameter int unsigned DataWidth = 0,
   parameter int unsigned NumWords  = 0,

diff --git a/hw/src/spatz.sv b/hw/src/spatz.sv
@@ -15,7 +15,7 @@
 
 `define X_INTERFACE
 
-module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
+module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; import cc_pkg::*; #(
     parameter int                  unsigned NrMemPorts          = 1,
     parameter bit                           RegisterRsp         = 0,
     // Memory request (VLSU)
@@ -163,8 +163,8 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
   // When the responses from EX units are not committed to the VRF,
   // buffers store the metadata to commit to the VRF in later cycles
 
-  logic [$clog2(FpuBufDepth)-1:0] vfu_buf_usage;
-  logic [$clog2(VlsuBufDepth)-1:0] vlsu_buf_usage;
+  logic [cnt_width(FpuBufDepth)-1:0] vfu_buf_usage;
+  logic [cnt_width(VlsuBufDepth)-1:0] vlsu_buf_usage;
 
   typedef struct packed {
     vrf_data_t wdata;
@@ -505,15 +505,15 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
   // Ack 1'b1 to the VFU as long as the buffer is not full
   assign vrf_vfu_wvalid = sb_we[VFU_VD_WD] && !vfu_buf_full;
 
-  fifo_v3 #(
-    .FALL_THROUGH (1'b0        ),
-    .dtype        (vfu_buf_t   ),
-    .DEPTH        (FpuBufDepth )
+  cc_fifo #(
+    .FallThrough (1'b0        ),
+    .data_t        (vfu_buf_t   ),
+    .Depth        (FpuBufDepth )
   ) i_vfu_buf (
     .clk_i      (clk_i                   ),
     .rst_ni     (rst_ni                  ),
+    .clr_i     (1'b0),
     .flush_i    (1'b0                    ),
-    .testmode_i (1'b0                    ),
     .full_o     (vfu_buf_full            ),
     .empty_o    (vfu_buf_empty           ),
     .usage_o    (vfu_buf_usage           ),
@@ -537,15 +537,15 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
   assign vlsu_buf_pop = vrf_wvalid[VLSU_VD_WD1] && !vlsu_buf_empty;
   assign vrf_vlsu_wvalid = sb_we[VLSU_VD_WD1] && !vlsu_buf_full;
 
-  fifo_v3 #(
-    .FALL_THROUGH (1'b0         ),
-    .dtype        (vlsu_buf_t   ),
-    .DEPTH        (VlsuBufDepth )
+  cc_fifo #(
+    .FallThrough (1'b0         ),
+    .data_t        (vlsu_buf_t   ),
+    .Depth        (VlsuBufDepth )
   ) i_vlsu_buf (
     .clk_i      (clk_i                    ),
     .rst_ni     (rst_ni                   ),
+    .clr_i     (1'b0),
     .flush_i    (1'b0                     ),
-    .testmode_i (1'b0                     ),
     .full_o     (vlsu_buf_full            ),
     .empty_o    (vlsu_buf_empty           ),
     .usage_o    (vlsu_buf_usage           ),

diff --git a/hw/src/spatz_controller.sv b/hw/src/spatz_controller.sv
@@ -199,13 +199,12 @@ module spatz_controller
   logic       req_buffer_ready, req_buffer_valid, req_buffer_pop;
 
   // One element wide instruction buffer
-  fall_through_register #(
-    .T(spatz_req_t)
+  cc_fall_through_register #(
+    .data_t(spatz_req_t)
   ) i_req_buffer (
     .clk_i     (clk_i                ),
     .rst_ni    (rst_ni               ),
     .clr_i     (1'b0                 ),
-    .testmode_i(1'b0                 ),
     .ready_o   (req_buffer_ready     ),
     .valid_o   (req_buffer_valid     ),
     .data_i    (decoder_rsp.spatz_req),
@@ -506,12 +505,13 @@ module spatz_controller
   logic                                   running_insn_full;
   `FF(running_insn_q, running_insn_d, '0)
 
-  find_first_one #(
-    .WIDTH(NrParallelInstructions)
+  cc_lzc #(
+    .Width(NrParallelInstructions),
+    .Mode (cc_pkg::LZC_TRAILING_ZERO_CNT)
   ) i_ffo_next_insn_id (
-    .in_i       (~running_insn_q  ),
-    .first_one_o(next_insn_id     ),
-    .no_ones_o  (running_insn_full)
+    .in_i    (~running_insn_q  ),
+    .cnt_o   (next_insn_id     ),
+    .empty_o (running_insn_full)
   );
 
   // Pop the buffer if we do not have a unit stall
@@ -605,8 +605,8 @@ module spatz_controller
           issue_rsp_o.writeback = spatz_req.use_rd;
         end // CON
         VFU: begin
-          // vtype is illegal -> illegal instruction
-          if (vtype_q.vill) begin
+          // Scalar FP ops use the VFU path but do not depend on the vector vtype CSR.
+          if (vtype_q.vill && !decoder_rsp.spatz_req.op_arith.is_scalar) begin
             issue_rsp_o.accept = 1'b0;
           end
         end // VFU
@@ -640,11 +640,12 @@ module spatz_controller
   logic     vfu_rsp_valid;
   logic     vfu_rsp_ready;
 
-  spill_register #(
-    .T(vfu_rsp_t)
+  cc_spill_register #(
+    .data_t(vfu_rsp_t)
   ) i_vfu_scalar_response (
     .clk_i  (clk_i                          ),
     .rst_ni (rst_ni                         ),
+    .clr_i  (1'b0),
     .data_i (vfu_rsp_i                      ),
     .valid_i(vfu_rsp_valid_i && vfu_rsp_i.wb),
     .ready_o(vfu_rsp_ready_o                ),
@@ -656,12 +657,13 @@ module spatz_controller
   logic       rsp_valid_d;
   logic       rsp_ready_d;
   spatz_rsp_t rsp_d;
-  spill_register #(
-    .T     (spatz_rsp_t ),
+  cc_spill_register #(
+    .data_t     (spatz_rsp_t ),
     .Bypass(!RegisterRsp)
   ) i_spatz_rsp_register (
     .clk_i  (clk_i       ),
     .rst_ni (rst_ni      ),
+    .clr_i  (1'b0),
     .data_i (rsp_d       ),
     .valid_i(rsp_valid_d ),
     .ready_o(rsp_ready_d ),