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Added dynamic control over CS between SPI DMA transfers#26

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Blackaddr wants to merge 3 commits into
crteensy:masterfrom
Blackaddr:dynamic_cs_control
Open

Added dynamic control over CS between SPI DMA transfers#26
Blackaddr wants to merge 3 commits into
crteensy:masterfrom
Blackaddr:dynamic_cs_control

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@Blackaddr

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I would like to use the DmaSpi for accessing SPI memory, such as the LC1024 on the Teensy Audio board. I have tested these changes in my BAGuitar repo, branch dma_spi. The library also did not compile on Teensy 3.2 because SPI1 doesn't exist. I've wrapped the SPI1 code in processor based defines similar to other libraries.

I have added to DmaSpi library dynamic control over the chip select behaviour from one transfer the next. This is necessary with SPI memories because they expect the first four bytes following CS activation to be command and address, then the payload follows. Backwards compatible behaviour is maintained.

The following procedure is required for DMA transfer to SPI memory

  • register a 4 byte transfer that assert CS at the start, but does not de-assert at the end.
  • register a transfer for the payload data that does not assert CS at the start, but does de-assert at the end.

This avoid having to copy the command/address and data payload into a single contiguous memory buffer.

E.g. Register the first transfer:
commandXfer = DmaSpi::Transfer(commandAddress, 4, nullptr, 0, cs, TransferType::NO_END_CS);
payloadXfer = DmaSpi::Transfer(payload, payloadSize, nulltpr, 0, cs, TransferType::NO_START_CS);
regularXfer = DmaSpi::Transfer(src, size, nullptr, 0, cs); // Default is TransferType::NORMAL

Please let me know if you have any questions!

  • Blackaddr

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