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5 changes: 2 additions & 3 deletions clash-prelude/src/Clash/Clocks/Internal.hs
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,6 @@ import Clash.CPP (haddockOnly)
import Clash.Explicit.Reset (resetSynchronizer)
import Clash.Explicit.Signal (unsafeSynchronizer)
import Clash.Magic (setName)
import Clash.Promoted.Symbol (SSymbol(..))
import Clash.Signal.Internal
(clockGen, Clock(..), Domain, KnownDomain, Reset, Signal, unsafeFromActiveLow,
unsafeToActiveLow)
Expand All @@ -51,7 +50,7 @@ deriveClocksInstance n =
type ClocksCxt $instType = $cxtType
type NumOutClocks $instType = $numOutClocks

clocks (Clock _ Nothing) $(varP rst) = $funcImpl
clocks (Clock Nothing) $(varP rst) = $funcImpl
clocks _ _ = error "clocks: dynamic clocks unsupported"
{-# OPAQUE clocks #-}
|]
Expand All @@ -73,7 +72,7 @@ deriveClocksInstance n =
lockImpl = [|
unsafeSynchronizer clockGen clockGen (unsafeToActiveLow $(varE rst))
|]
clkImpls = replicate n [| Clock SSymbol Nothing |]
clkImpls = replicate n [| Clock Nothing |]
funcImpl = tupE $ clkImpls <> [lockImpl]

-- Derive instances for up to and including 18 clocks, except when we are
Expand Down
2 changes: 1 addition & 1 deletion clash-prelude/src/Clash/Explicit/BlockRam.hs
Original file line number Diff line number Diff line change
Expand Up @@ -1065,7 +1065,7 @@ blockRam#
-- ^ Value to write (at address @w@)
-> Signal dom a
-- ^ Value of the BRAM at address @r@ from the previous clock cycle
blockRam# (Clock _ Nothing) gen content = \rd wen waS wd -> runST $ do
blockRam# (Clock Nothing) gen content = \rd wen waS wd -> runST $ do
ramStart <- newListArray (0,szI-1) contentL
-- start benchmark only
-- ramStart <- unsafeThawSTArray ramArr
Expand Down
2 changes: 1 addition & 1 deletion clash-prelude/src/Clash/Explicit/BlockRam/File.hs
Original file line number Diff line number Diff line change
Expand Up @@ -333,7 +333,7 @@ blockRamFile#
-- ^ Value to write (at address @w@)
-> Signal dom (BitVector m)
-- ^ Value of the BRAM at address @r@ from the previous clock cycle
blockRamFile# (Clock _ Nothing) ena sz file = \rd wen waS wd -> runST $ do
blockRamFile# (Clock Nothing) ena sz file = \rd wen waS wd -> runST $ do
ramStart <- newArray_ (0,szI)
unsafeIOToST (withFile file ReadMode (\h ->
forM_ [0..(szI-1)] (\i -> do
Expand Down
15 changes: 9 additions & 6 deletions clash-prelude/src/Clash/Explicit/DDR.hs
Original file line number Diff line number Diff line change
Expand Up @@ -51,9 +51,12 @@ import Clash.Signal.Internal
>>> import Clash.Explicit.DDR
>>> :{
type DDR = "DDR" :: Domain
instance KnownDomain "DDR" where
type KnownConf "DDR" = 'DomainConfiguration "DDR" 5000 'Rising 'Asynchronous 'Defined 'ActiveHigh
knownDomain = SDomainConfiguration SSymbol SNat SRising SAsynchronous SDefined SActiveHigh
instance KnownDomain DDR where
type DomainPeriod DDR = 5000
type DomainActiveEdge DDR = 'Rising
type DomainResetKind DDR = 'Asynchronous
type DomainInitBehavior DDR = 'Defined
type DomainResetPolarity DDR = 'ActiveHigh
:}

-}
Expand Down Expand Up @@ -115,7 +118,7 @@ ddrIn#
-> a
-> Signal domDDR a
-> Signal dom (a,a)
ddrIn# (Clock _ Nothing) (unsafeToActiveHigh -> hRst) (fromEnable -> ena) i0 i1 i2 =
ddrIn# (Clock Nothing) (unsafeToActiveHigh -> hRst) (fromEnable -> ena) i0 i1 i2 =
case resetKind @domDDR of
SAsynchronous ->
goAsync
Expand Down Expand Up @@ -305,8 +308,8 @@ ddrForwardClock#
=> Clock domIn
-> Signal domDDR Bit
-> Clock domOut
ddrForwardClock# (Clock SSymbol periods) ddrSignal =
Clock (ddrSignal `seq` SSymbol) (unsafeCoerce periods)
ddrForwardClock# (Clock periods) ddrSignal =
Clock (ddrSignal `seq` unsafeCoerce periods)
{-# OPAQUE ddrForwardClock# #-}
{-# ANN ddrForwardClock# (
let
Expand Down
1 change: 1 addition & 0 deletions clash-prelude/src/Clash/Explicit/Prelude.hs
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@ defined in "Clash.Prelude".

{-# LANGUAGE Unsafe #-}

{-# OPTIONS_GHC -fplugin=GHC.TypeLits.Normalise #-}
{-# OPTIONS_GHC -fplugin GHC.TypeLits.KnownNat.Solver #-}
{-# OPTIONS_HADDOCK show-extensions, not-home #-}

Expand Down
30 changes: 17 additions & 13 deletions clash-prelude/src/Clash/Explicit/Signal.hs
Original file line number Diff line number Diff line change
Expand Up @@ -46,9 +46,12 @@ made. Clash provides a standard implementation, called 'System', that is
configured as follows:

@
instance KnownDomain 'System' where
type KnownConf 'System' = 'DomainConfiguration 'System' 10000 'Rising 'Asynchronous 'Defined 'ActiveHigh
knownDomain = 'SDomainConfiguration' SSymbol SNat 'SRising' 'SAsynchronous' 'SDefined' 'SActiveHigh'
instance KnownDomain System where
type DomainPeriod System = 10000
type DomainActiveEdge System = 'Rising
type DomainResetKind System = 'Asynchronous
type DomainInitBehavior System = 'Defined
type DomainResetPolarity System = 'ActiveHigh
@

In words, \"System\" is a synthesis domain with a clock running with a period
Expand Down Expand Up @@ -166,12 +169,6 @@ module Clash.Explicit.Signal
, SResetPolarity(..)
, DomainConfiguration(..)
, SDomainConfiguration(..)
-- ** Configuration type families
, DomainPeriod
, DomainActiveEdge
, DomainResetKind
, DomainInitBehavior
, DomainResetPolarity
-- *** Convenience types #conveniencetypes#
-- $conveniencetypes

Expand Down Expand Up @@ -200,6 +197,7 @@ module Clash.Explicit.Signal
-- ** Domain utilities
, VDomainConfiguration(..)
, vDomain
, knownDomain
, createDomain
, knownVDomain
, clockPeriod
Expand Down Expand Up @@ -320,14 +318,20 @@ import Clash.XException
>>> import qualified Data.List as L
>>> :{
instance KnownDomain "Dom2" where
type KnownConf "Dom2" = 'DomainConfiguration "Dom2" 2 'Rising 'Asynchronous 'Defined 'ActiveHigh
knownDomain = SDomainConfiguration SSymbol SNat SRising SAsynchronous SDefined SActiveHigh
type DomainPeriod "Dom2" = 2
type DomainActiveEdge "Dom2" = 'Rising
type DomainResetKind "Dom2" = 'Asynchronous
type DomainInitBehavior "Dom2" = 'Defined
type DomainResetPolarity "Dom2" = 'ActiveHigh
:}

>>> :{
instance KnownDomain "Dom7" where
type KnownConf "Dom7" = 'DomainConfiguration "Dom7" 7 'Rising 'Asynchronous 'Defined 'ActiveHigh
knownDomain = SDomainConfiguration SSymbol SNat SRising SAsynchronous SDefined SActiveHigh
type DomainPeriod "Dom7" = 7
type DomainActiveEdge "Dom7" = 'Rising
type DomainResetKind "Dom7" = 'Asynchronous
type DomainInitBehavior "Dom7" = 'Defined
type DomainResetPolarity "Dom7" = 'ActiveHigh
:}

>>> type Dom2 = "Dom2"
Expand Down
4 changes: 2 additions & 2 deletions clash-prelude/src/Clash/Explicit/Testbench.hs
Original file line number Diff line number Diff line change
Expand Up @@ -41,14 +41,14 @@ where

import Control.Exception (catch, evaluate)
import Debug.Trace (trace)
import Data.Proxy (Proxy(..))
import GHC.TypeLits (KnownNat, type (+), type (<=))
import Prelude hiding ((!!), length)
import System.IO.Unsafe (unsafeDupablePerformIO)

import Clash.Annotations.Primitive (hasBlackBox)
import Clash.Class.Num (satSucc, SaturationMode(SatBound))
import Clash.Promoted.Nat (SNat(..))
import Clash.Promoted.Symbol (SSymbol(..))
import Clash.Explicit.Signal
(Clock, Reset, System, Signal, toEnable, fromList, register,
unbundle, unsafeSynchronizer)
Expand Down Expand Up @@ -475,7 +475,7 @@ clockToDiffClock ::
Clock dom ->
-- | Differential output
DiffClock dom
clockToDiffClock clk = DiffClock clk (ClockN SSymbol)
clockToDiffClock clk = DiffClock clk (ClockN Proxy)
{-# OPAQUE clockToDiffClock #-}
{-# ANN clockToDiffClock hasBlackBox #-}

Expand Down
16 changes: 7 additions & 9 deletions clash-prelude/src/Clash/Signal.hs
Original file line number Diff line number Diff line change
Expand Up @@ -45,9 +45,12 @@ made. Clash provides an implementation 'System' with some common options
chosen:

@
instance KnownDomain 'System' where
type KnownConf 'System' = 'DomainConfiguration 'System' 10000 'Rising 'Asynchronous 'Defined 'ActiveHigh
knownDomain = SDomainConfiguration SSymbol SNat SRising SAsynchronous SDefined SActiveHigh
instance KnownDomain System where
type DomainPeriod System = 10000
type DomainActiveEdge System = 'Rising
type DomainResetKind System = 'Asynchronous
type DomainInitBehavior System = 'Defined
type DomainResetPolarity System = 'ActiveHigh
@

In words, \"System\" is a synthesis domain with a clock running with a period
Expand Down Expand Up @@ -100,12 +103,6 @@ module Clash.Signal
, SResetPolarity(..)
, DomainConfiguration(..)
, SDomainConfiguration(..)
-- ** Configuration type families
, DomainPeriod
, DomainActiveEdge
, DomainResetKind
, DomainInitBehavior
, DomainResetPolarity
-- *** Convenience types
-- $conveniencetypes

Expand Down Expand Up @@ -134,6 +131,7 @@ module Clash.Signal
-- ** Domain utilities
, VDomainConfiguration(..)
, vDomain
, knownDomain
, createDomain
, knownVDomain
, clockPeriod
Expand Down
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