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Sigma Delta ADC#2617

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FloriaanB wants to merge 17 commits into
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FloriaanB:SigmaDeltaADC
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Sigma Delta ADC#2617
FloriaanB wants to merge 17 commits into
clash-lang:masterfrom
FloriaanB:SigmaDeltaADC

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@FloriaanB
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Added a Sigma Delta ADC to Clash Cores

Still TODO:

  • Write a changelog entry (see changelog/README.md)
  • Check copyright notices are up to date in edited files

@DigitalBrains1
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@kloonbot run_ci a86a4ec

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@lmbollen lmbollen left a comment

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In general I really like the clarity of the code + the documentation.
However, I do think we could do with less one time use functions, we could move some functionality to the respective components. I'll discuss more irl

Comment thread clash-cores/src/Clash/Cores/SigmaDeltaADC.hs Outdated
Comment thread clash-cores/src/Clash/Cores/SigmaDeltaADC.hs Outdated
Comment thread clash-cores/src/Clash/Cores/SigmaDeltaADC.hs Outdated
Comment thread clash-cores/src/Clash/Cores/SigmaDeltaADC.hs Outdated
Comment thread clash-cores/src/Clash/Cores/SigmaDeltaADC.hs Outdated
)
=> SNat n0
-- ^ ADC width
-> SNat (n0 + n1)
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How do I determine this number?

-- ^ Accumulator width
-- Has to be larger or equal to the ADC width,
-- the OSR is equal to 2^(AccumulatorWidth - ADCwidth)
-> SNat n2
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How do I determine this number?

Comment thread clash-cores/src/Clash/Cores/SigmaDeltaADC.hs Outdated
Comment thread clash-cores/src/Clash/Cores/SigmaDeltaADC.hs Outdated
Comment on lines +249 to +252
-- 1. feedback to the RC network:
-- The R and C of the low pass network need to be chosen such that:
-- RC inbetween 200 and 1000 x clk, where clk is the frequency of
-- output
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I think this too, should be at module level or function level.

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Is there an optimal value? if so, how do we choose it?

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4 participants