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Merged
rossberg merged 4 commits into from
May 13, 2026
Merged

[spec] Add missing text format for relaxed_dot instructions #2163

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6faf801
[spec] Add missing text format for relaxed_dot instructions
rossberg May 11, 2026
6352d62
Fix name
rossberg May 11, 2026
0c5f25e
Merge branch 'main' into fix.2157
rossberg May 12, 2026
7af2b2c
Merge branch 'main' into fix.2157
rossberg May 13, 2026
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1 change: 1 addition & 0 deletions document/core/text/instructions.rst
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Expand Up @@ -403,6 +403,7 @@ $${grammar: {
Tplaininstr_/vec-extbin-i16x8
Tplaininstr_/vec-extun-i32x4
Tplaininstr_/vec-extbin-i32x4
Tplaininstr_/vec-exttern-i32x4
Tplaininstr_/vec-extbin-i64x2
}}

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5 changes: 5 additions & 0 deletions specification/wasm-3.0/6.3-text.instructions.spectec
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Expand Up @@ -983,6 +983,7 @@ grammar Tplaininstr_(I)/vec-extbin-i16x8 : instr = ...
| "i16x8.extmul_high_i8x16_s" => VEXTBINOP (I16 X `8) (I8 X `16) EXTMUL HIGH S
| "i16x8.extmul_high_i8x16_u" => VEXTBINOP (I16 X `8) (I8 X `16) EXTMUL HIGH U
;;| "i16x8.dot_i8x16_s" => VEXTBINOP (I16 X `8) (I8 X `16) DOT S ;; does not exist!
| "i16x8.relaxed_dot_i8x16_i7x16_s" => VEXTBINOP (I16 X `8) (I8 X `16) RELAXED_DOT S
| ...

grammar Tplaininstr_(I)/vec-extbin-i32x4 : instr = ...
Expand All @@ -999,6 +1000,10 @@ grammar Tplaininstr_(I)/vec-extbin-i64x2 : instr = ...
| "i64x2.extmul_high_i32x4_s" => VEXTBINOP (I64 X `2) (I32 X `4) EXTMUL HIGH S
| "i64x2.extmul_high_i32x4_u" => VEXTBINOP (I64 X `2) (I32 X `4) EXTMUL HIGH U
;;| "i64x2.dot_i32x4_s" => VEXTBINOP (I64 X `2) (I32 X `4) DOT S ;; does not exist!
| ...

grammar Tplaininstr_(I)/vec-exttern-i32x4 : instr = ...
| "i32x4.relaxed_dot_i8x16_i7x16_add_s" => VEXTTERNOP (I32 X `4) (I16 X `8) RELAXED_DOT_ADD S


;; Expressions
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5 changes: 5 additions & 0 deletions specification/wasm-latest/6.3-text.instructions.spectec
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Expand Up @@ -983,6 +983,7 @@ grammar Tplaininstr_(I)/vec-extbin-i16x8 : instr = ...
| "i16x8.extmul_high_i8x16_s" => VEXTBINOP (I16 X `8) (I8 X `16) EXTMUL HIGH S
| "i16x8.extmul_high_i8x16_u" => VEXTBINOP (I16 X `8) (I8 X `16) EXTMUL HIGH U
;;| "i16x8.dot_i8x16_s" => VEXTBINOP (I16 X `8) (I8 X `16) DOT S ;; does not exist!
| "i16x8.relaxed_dot_i8x16_i7x16_s" => VEXTBINOP (I16 X `8) (I8 X `16) RELAXED_DOT S
| ...

grammar Tplaininstr_(I)/vec-extbin-i32x4 : instr = ...
Expand All @@ -999,6 +1000,10 @@ grammar Tplaininstr_(I)/vec-extbin-i64x2 : instr = ...
| "i64x2.extmul_high_i32x4_s" => VEXTBINOP (I64 X `2) (I32 X `4) EXTMUL HIGH S
| "i64x2.extmul_high_i32x4_u" => VEXTBINOP (I64 X `2) (I32 X `4) EXTMUL HIGH U
;;| "i64x2.dot_i32x4_s" => VEXTBINOP (I64 X `2) (I32 X `4) DOT S ;; does not exist!
| ...

grammar Tplaininstr_(I)/vec-exttern-i32x4 : instr = ...
| "i32x4.relaxed_dot_i8x16_i7x16_add_s" => VEXTTERNOP (I32 X `4) (I16 X `8) RELAXED_DOT_ADD S


;; Expressions
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Binary file modified spectec/doc/example/output/NanoWasm.pdf
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4 changes: 4 additions & 0 deletions spectec/test-frontend/TEST.md
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Expand Up @@ -12004,6 +12004,8 @@ grammar Tplaininstr_(I : I) : instr
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i16x8.extmul_high_i8x16_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16))), EXTMUL_vextbinop__(HIGH_half, U_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i16x8.relaxed_dot_i8x16_i7x16_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16))), RELAXED_DOTS_vextbinop__)
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.extmul_low_i16x8_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), EXTMUL_vextbinop__(LOW_half, S_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.extmul_low_i16x8_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), EXTMUL_vextbinop__(LOW_half, U_sx))
Expand All @@ -12021,6 +12023,8 @@ grammar Tplaininstr_(I : I) : instr
prod "i64x2.extmul_high_i32x4_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2))), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), EXTMUL_vextbinop__(HIGH_half, S_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i64x2.extmul_high_i32x4_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2))), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), EXTMUL_vextbinop__(HIGH_half, U_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.relaxed_dot_i8x16_i7x16_add_s" => VEXTTERNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), RELAXED_DOT_ADDS_vextternop__)

;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
rec {
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2 changes: 2 additions & 0 deletions spectec/test-latex/TEST.md
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Expand Up @@ -13565,6 +13565,7 @@ $$
& & | & \mbox{‘\texttt{i16x8.extmul\_low\_i8x16\_u}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 16}}}{\mathsf{x}}{\mathsf{{\scriptstyle 8}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{low}}{\mathsf{\_}}{\mathsf{u}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 8}}}{\mathsf{x}}{\mathsf{{\scriptstyle 16}}}} \\
& & | & \mbox{‘\texttt{i16x8.extmul\_high\_i8x16\_s}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 16}}}{\mathsf{x}}{\mathsf{{\scriptstyle 8}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{high}}{\mathsf{\_}}{\mathsf{s}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 8}}}{\mathsf{x}}{\mathsf{{\scriptstyle 16}}}} \\
& & | & \mbox{‘\texttt{i16x8.extmul\_high\_i8x16\_u}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 16}}}{\mathsf{x}}{\mathsf{{\scriptstyle 8}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{high}}{\mathsf{\_}}{\mathsf{u}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 8}}}{\mathsf{x}}{\mathsf{{\scriptstyle 16}}}} \\
& & | & \mbox{‘\texttt{i16x8.relaxed\_dot\_i8x16\_i7x16\_s}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 16}}}{\mathsf{x}}{\mathsf{{\scriptstyle 8}}} {.} {{\mathsf{relaxed\_dot}}{\mathsf{\_}}{\mathsf{s}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 8}}}{\mathsf{x}}{\mathsf{{\scriptstyle 16}}}} \\
& & | & \mbox{‘\texttt{i32x4.extmul\_low\_i16x8\_s}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 32}}}{\mathsf{x}}{\mathsf{{\scriptstyle 4}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{low}}{\mathsf{\_}}{\mathsf{s}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 16}}}{\mathsf{x}}{\mathsf{{\scriptstyle 8}}}} \\
& & | & \mbox{‘\texttt{i32x4.extmul\_low\_i16x8\_u}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 32}}}{\mathsf{x}}{\mathsf{{\scriptstyle 4}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{low}}{\mathsf{\_}}{\mathsf{u}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 16}}}{\mathsf{x}}{\mathsf{{\scriptstyle 8}}}} \\
& & | & \mbox{‘\texttt{i32x4.extmul\_high\_i16x8\_s}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 32}}}{\mathsf{x}}{\mathsf{{\scriptstyle 4}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{high}}{\mathsf{\_}}{\mathsf{s}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 16}}}{\mathsf{x}}{\mathsf{{\scriptstyle 8}}}} \\
Expand All @@ -13574,6 +13575,7 @@ $$
& & | & \mbox{‘\texttt{i64x2.extmul\_low\_i32x4\_u}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 64}}}{\mathsf{x}}{\mathsf{{\scriptstyle 2}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{low}}{\mathsf{\_}}{\mathsf{u}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 32}}}{\mathsf{x}}{\mathsf{{\scriptstyle 4}}}} \\
& & | & \mbox{‘\texttt{i64x2.extmul\_high\_i32x4\_s}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 64}}}{\mathsf{x}}{\mathsf{{\scriptstyle 2}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{high}}{\mathsf{\_}}{\mathsf{s}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 32}}}{\mathsf{x}}{\mathsf{{\scriptstyle 4}}}} \\
& & | & \mbox{‘\texttt{i64x2.extmul\_high\_i32x4\_u}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 64}}}{\mathsf{x}}{\mathsf{{\scriptstyle 2}}} {.} {{\mathsf{extmul}}{\mathsf{\_}}{\mathsf{high}}{\mathsf{\_}}{\mathsf{u}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 32}}}{\mathsf{x}}{\mathsf{{\scriptstyle 4}}}} \\
& & | & \mbox{‘\texttt{i32x4.relaxed\_dot\_i8x16\_i7x16\_add\_s}’} & \quad\Rightarrow\quad{} & {\mathsf{i{\scriptstyle 32}}}{\mathsf{x}}{\mathsf{{\scriptstyle 4}}} {.} {{\mathsf{relaxed\_dot\_add}}{\mathsf{\_}}{\mathsf{s}}}{\mathsf{\_}}{{\mathsf{i{\scriptstyle 16}}}{\mathsf{x}}{\mathsf{{\scriptstyle 8}}}} \\
\end{array}
$$

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12 changes: 12 additions & 0 deletions spectec/test-middlend/TEST.md
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Expand Up @@ -11527,6 +11527,8 @@ grammar Tplaininstr_(I : I) : instr
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i16x8.extmul_high_i8x16_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16))), EXTMUL_vextbinop__(HIGH_half, U_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i16x8.relaxed_dot_i8x16_i7x16_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16))), RELAXED_DOTS_vextbinop__)
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.extmul_low_i16x8_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), EXTMUL_vextbinop__(LOW_half, S_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.extmul_low_i16x8_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), EXTMUL_vextbinop__(LOW_half, U_sx))
Expand All @@ -11544,6 +11546,8 @@ grammar Tplaininstr_(I : I) : instr
prod "i64x2.extmul_high_i32x4_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2))), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), EXTMUL_vextbinop__(HIGH_half, S_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i64x2.extmul_high_i32x4_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2))), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), EXTMUL_vextbinop__(HIGH_half, U_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.relaxed_dot_i8x16_i7x16_add_s" => VEXTTERNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), RELAXED_DOT_ADDS_vextternop__)

;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
rec {
Expand Down Expand Up @@ -23377,6 +23381,8 @@ grammar Tplaininstr_(I : I) : instr
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i16x8.extmul_high_i8x16_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16))), EXTMUL_vextbinop__(HIGH_half, U_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i16x8.relaxed_dot_i8x16_i7x16_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16))), RELAXED_DOTS_vextbinop__)
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.extmul_low_i16x8_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), EXTMUL_vextbinop__(LOW_half, S_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.extmul_low_i16x8_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), EXTMUL_vextbinop__(LOW_half, U_sx))
Expand All @@ -23394,6 +23400,8 @@ grammar Tplaininstr_(I : I) : instr
prod "i64x2.extmul_high_i32x4_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2))), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), EXTMUL_vextbinop__(HIGH_half, S_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i64x2.extmul_high_i32x4_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2))), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), EXTMUL_vextbinop__(HIGH_half, U_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.relaxed_dot_i8x16_i7x16_add_s" => VEXTTERNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), RELAXED_DOT_ADDS_vextternop__)

;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
rec {
Expand Down Expand Up @@ -35466,6 +35474,8 @@ grammar Tplaininstr_(I : I) : instr
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i16x8.extmul_high_i8x16_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16))), EXTMUL_vextbinop__(HIGH_half, U_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i16x8.relaxed_dot_i8x16_i7x16_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), `%`_ishape(`%X%`_shape(I8_lanetype, `%`_dim(16))), RELAXED_DOTS_vextbinop__)
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.extmul_low_i16x8_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), EXTMUL_vextbinop__(LOW_half, S_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.extmul_low_i16x8_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), EXTMUL_vextbinop__(LOW_half, U_sx))
Expand All @@ -35483,6 +35493,8 @@ grammar Tplaininstr_(I : I) : instr
prod "i64x2.extmul_high_i32x4_s" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2))), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), EXTMUL_vextbinop__(HIGH_half, S_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i64x2.extmul_high_i32x4_u" => VEXTBINOP_instr(`%`_ishape(`%X%`_shape(I64_lanetype, `%`_dim(2))), `%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), EXTMUL_vextbinop__(HIGH_half, U_sx))
;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
prod "i32x4.relaxed_dot_i8x16_i7x16_add_s" => VEXTTERNOP_instr(`%`_ishape(`%X%`_shape(I32_lanetype, `%`_dim(4))), `%`_ishape(`%X%`_shape(I16_lanetype, `%`_dim(8))), RELAXED_DOT_ADDS_vextternop__)

;; ../../../../specification/wasm-latest/6.3-text.instructions.spectec
rec {
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1 change: 1 addition & 0 deletions spectec/test-splice/TEST.md
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Expand Up @@ -903,6 +903,7 @@ warning: grammar `Tplaininstr_/vec-extun-i32x4` was never spliced
warning: grammar `Tplaininstr_/vec-extbin-i16x8` was never spliced
warning: grammar `Tplaininstr_/vec-extbin-i32x4` was never spliced
warning: grammar `Tplaininstr_/vec-extbin-i64x2` was never spliced
warning: grammar `Tplaininstr_/vec-exttern-i32x4` was never spliced
warning: grammar `Trectype_/base` was never spliced
warning: grammar `Trectype_/abbrev` was never spliced
warning: grammar `Treftype_/base` was never spliced
Expand Down
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