[CI] Add FTD to CI pipeline - #658
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@AyaElAkhras @QinYuan2000 I wanted to add Matvec with FTD as well, but it doesn't work in the current main. Could you please take a look? |
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Thanks @Jiahui17 for reporting! I checked from my side and the current main crashes because of some wrong casting. I need some time to identify the recent commit to the main that resulted in this. |
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This is the commit 1567b7c that results in this error. I will dig further into the commit to figure out the issue. |
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@AyaElAkhras Any progress on this? |
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Thanks, @Jiahui17, for bringing this back to life! Could you also add the The flag essentially removes the network of CMerges by implementing the approach from my FPGA'23 paper: if there is an LSQ, it replaces the CMerge network accordingly; if the function is void, it leaves the network unchanged; and if the function is non-void, it removes the network entirely. |
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does it make sense to always switch that flag on if we have |
Yes, this works, thanks! |
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Could you make sure that the new added units also work in verilog? |
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