diff --git a/axi/axi-stream/rtl/AxiStreamCompact.vhd b/axi/axi-stream/rtl/AxiStreamCompact.vhd index 8862b3af1b..a3feb0f75b 100755 --- a/axi/axi-stream/rtl/AxiStreamCompact.vhd +++ b/axi/axi-stream/rtl/AxiStreamCompact.vhd @@ -2,7 +2,10 @@ -- Company : SLAC National Accelerator Laboratory ------------------------------------------------------------------------------- -- Description: --- Block to compact AXI-Streams if tKeep bits are not contiguous +-- Packs non-full AXI-Stream beats into fully-utilised output words. +-- Simplification assumed: tKeep is always a contiguous mask from bit 0 +-- (e.g. 0x00FF is legal, 0x0FF0 is not). +-- Master bus width must be >= slave bus width. ------------------------------------------------------------------------------- -- This file is part of 'SLAC Firmware Standard Library'. -- It is subject to the license terms in the LICENSE.txt file found in the @@ -44,57 +47,30 @@ end entity AxiStreamCompact; architecture rtl of AxiStreamCompact is - function getTKeepMin ( - tKeep : slv; - axisConfig : AxiStreamConfigType) - return natural is - variable tKeepFull : slv(AXI_STREAM_MAX_TKEEP_WIDTH_C-1 downto 0); - variable i : natural; - begin -- function getTKeepRange - tKeepFull := resize(tKeep, AXI_STREAM_MAX_TKEEP_WIDTH_C); - for i in 0 to axisConfig.TDATA_BYTES_C-1 loop - if tKeepFull(i) = '1' then - return i; - end if; - end loop; -- i - end function getTKeepMin; - - function getTKeepMax ( - tKeep : slv; - axisConfig : AxiStreamConfigType) - return natural is - variable tKeepFull : slv(AXI_STREAM_MAX_TKEEP_WIDTH_C-1 downto 0); - variable i : natural; - begin -- function getTKeepRange - tKeepFull := resize(tKeep, AXI_STREAM_MAX_TKEEP_WIDTH_C); - for i in axisConfig.TDATA_BYTES_C-1 downto 0 loop - if tKeepFull(i) = '1' then - return i; - end if; - end loop; -- i - end function getTKeepMax; - constant SLV_BYTES_C : positive := SLAVE_AXI_CONFIG_G.TDATA_BYTES_C; constant MST_BYTES_C : positive := MASTER_AXI_CONFIG_G.TDATA_BYTES_C; + -- accData / accKeep are double-wide so we can always shift new bytes in + -- at offset r.count without overflow (count < MST_BYTES_C, new bytes + -- <= SLV_BYTES_C, MST_BYTES_C >= SLV_BYTES_C). type RegType is record - count : natural; + accData : slv(2*MST_BYTES_C*8 - 1 downto 0); + accKeep : slv(2*MST_BYTES_C - 1 downto 0); + count : natural range 0 to MST_BYTES_C - 1; -- buffered byte count + pendingLast : boolean; -- a tLast beat overflowed; remainder still in acc obMaster : AxiStreamMasterType; ibSlave : AxiStreamSlaveType; - tLastDet : boolean; - tLastOnNext : boolean; tUserSet : boolean; - fullBus : boolean; end record RegType; constant REG_INIT_C : RegType := ( + accData => (others => '0'), + accKeep => (others => '0'), count => 0, + pendingLast => false, obMaster => axiStreamMasterInit(MASTER_AXI_CONFIG_G), ibSlave => AXI_STREAM_SLAVE_INIT_C, - tLastDet => false, - tLastOnNext => false, - tUserSet => false, - fullBus => false); + tUserSet => false); signal r : RegType := REG_INIT_C; signal rin : RegType; @@ -102,161 +78,176 @@ architecture rtl of AxiStreamCompact is signal pipeAxisMaster : AxiStreamMasterType; signal pipeAxisSlave : AxiStreamSlaveType; -begin -- architecture rtl +begin - -- Make sure data widths are the same assert (MST_BYTES_C >= SLV_BYTES_C) - report "Master data widths must be greater or equal than slave" severity failure; + report "Master data width must be >= slave data width" severity failure; comb : process (axisRst, pipeAxisSlave, r, sAxisMaster) is - variable v : RegType; - variable tKeepMin : natural; - variable tKeepWidth : natural; - variable tDataWidth : natural; - variable tDataMin : natural; - variable tDataCount : natural; - variable tDataVar : slv(sAxisMaster.tData'range); - begin -- process - -- Latch current value + variable v : RegType; + variable newBytes : natural range 0 to SLV_BYTES_C; + variable total : natural range 0 to MST_BYTES_C + SLV_BYTES_C; + begin v := r; - -- Init ready + -- Default: block input v.ibSlave.tReady := '0'; - v.tLastDet := false; - v.tLastOnNext := false; - -- Choose ready source and clear valid - if (pipeAxisSlave.tReady = '1') then + -- Free the output slot when downstream consumes the beat + if pipeAxisSlave.tReady = '1' then v.obMaster.tValid := '0'; end if; - -- Accept input data - if v.obMaster.tValid = '0' and not r.tLastOnNext then - - -- Ready to accept - v.ibSlave.tReady := '1'; - - -- Input data is valid - if sAxisMaster.tValid = '1' then - - -- Reset full flags - v.fullBus := false; - - -- get tKeep boundaries - tKeepMin := getTKeepMin(sAxisMaster.tKeep, SLAVE_AXI_CONFIG_G); - tKeepWidth := getTKeep(sAxisMaster.tKeep, SLAVE_AXI_CONFIG_G); - tDataWidth := to_integer(shift_left(to_unsigned(tKeepWidth, SLV_BYTES_C), 3)); - tDataCount := to_integer(shift_left(to_unsigned(r.count, SLV_BYTES_C), 3)); - tDataMin := to_integer(shift_left(to_unsigned(tKeepMin, SLV_BYTES_C), 3)); - - -- Checks - -- -- Overflow - if tKeepWidth + r.count >= MASTER_AXI_CONFIG_G.TDATA_BYTES_C then - v.fullBus := true; - end if; - -- -- tLast - v.tLastDet := false; - if sAxisMaster.tLast = '1' then - v.tLastDet := true; - if tKeepWidth + r.count > MST_BYTES_C then - v.tLastDet := false; - v.tLastOnNext := true; - end if; - end if; - - -- Gen bus - -- Shift if bus was full - if r.fullBus and not r.tLastOnNext then - v.obMaster.tData := std_logic_vector(shift_right(unsigned(r.obMaster.tData), MST_BYTES_C*8)); - end if; - ---- Remove initial bits - tDataVar := std_logic_vector(shift_right(unsigned(sAxisMaster.tData), tDataMin)); - v.obMaster.tData(v.obMaster.tData'length-1 downto tDataCount+tDataWidth) := (others => '0'); - v.obMaster.tData(tDataCount+tDataWidth-1 downto tDataCount) := tDataVar(tDataWidth-1 downto 0); - v.obMaster.tKeep := (others => '0'); - v.obMaster.tKeep(r.count+tKeepWidth-1 downto 0) := (others => '1'); - if not r.tUserSet then - v.obMaster.tUser := sAxisMaster.tUser; - v.tUserSet := true; - end if; - - -- Update counter - v.count := r.count + tKeepWidth; - - -- Bus is full - if v.fullBus or v.tLastDet or r.tLastOnNext then - -- Set tValid - v.obMaster.tValid := '1'; - -- Update bit counter and shift data - if v.fullBus then - v.count := r.count + tKeepWidth - MST_BYTES_C; - else - v.count := 0; + -- Output slot is free – we can do work + if v.obMaster.tValid = '0' then + + -- Case A: a previous tLast beat overflowed; flush the remainder first + if r.pendingLast then + v.obMaster.tData := (others => '0'); + v.obMaster.tData(MST_BYTES_C*8-1 downto 0) := + r.accData(MST_BYTES_C*8-1 downto 0); + v.obMaster.tKeep := (others => '0'); + v.obMaster.tKeep(MST_BYTES_C-1 downto 0) := + r.accKeep(MST_BYTES_C-1 downto 0); + v.obMaster.tValid := '1'; + v.obMaster.tLast := '1'; + -- Clear accumulator + v.accData := (others => '0'); + v.accKeep := (others => '0'); + v.count := 0; + v.pendingLast := false; + v.tUserSet := false; + -- Do NOT accept new input this cycle + v.ibSlave.tReady := '0'; + + -- Case B: normal operation – accept input + else + v.ibSlave.tReady := '1'; + + if sAxisMaster.tValid = '1' then + + newBytes := conv_integer(onesCount(sAxisMaster.tKeep(SLV_BYTES_C-1 downto 0))); + + -- Latch tUser from the first beat of each packet + if not r.tUserSet then + v.obMaster.tUser := sAxisMaster.tUser; + v.tUserSet := true; end if; - -- Set tLast - if v.tLastDet and not v.tLastOnNext then - v.obMaster.tLast := '1'; + + -- Insert new bytes into accumulator at bit-offset r.count + v.accData := r.accData; + v.accData(r.count*8 + SLV_BYTES_C*8 - 1 downto r.count*8) := + sAxisMaster.tData(SLV_BYTES_C*8-1 downto 0); + + v.accKeep := r.accKeep; + v.accKeep(r.count + SLV_BYTES_C - 1 downto r.count) := + sAxisMaster.tKeep(SLV_BYTES_C-1 downto 0); + + total := r.count + newBytes; + + -- Enough bytes to fill an output word? + if total >= MST_BYTES_C then + + -- Emit the lower MST_BYTES_C bytes + v.obMaster.tData := (others => '0'); + v.obMaster.tData(MST_BYTES_C*8-1 downto 0) := + v.accData(MST_BYTES_C*8-1 downto 0); + v.obMaster.tKeep := (others => '0'); + v.obMaster.tKeep(MST_BYTES_C-1 downto 0) := (others => '1'); + v.obMaster.tValid := '1'; + v.obMaster.tLast := '0'; + + -- Shift the remainder down + v.accData := std_logic_vector( + shift_right(unsigned(v.accData), MST_BYTES_C*8)); + v.accKeep := std_logic_vector( + shift_right(unsigned(v.accKeep), MST_BYTES_C)); + + v.count := total - MST_BYTES_C; + + if sAxisMaster.tLast = '1' then + if total = MST_BYTES_C then + -- Exact fit: tLast goes on this beat, nothing left over + v.obMaster.tLast := '1'; + v.count := 0; + v.tUserSet := false; + v.accData := (others => '0'); + v.accKeep := (others => '0'); + else + -- Overflow: remainder must go out next cycle + v.pendingLast := true; + end if; + end if; + + -- Not enough bytes yet, but this is the last beat – flush partial + elsif sAxisMaster.tLast = '1' then + + v.obMaster.tData := (others => '0'); + v.obMaster.tData(MST_BYTES_C*8-1 downto 0) := + v.accData(MST_BYTES_C*8-1 downto 0); + v.obMaster.tKeep := (others => '0'); + v.obMaster.tKeep(MST_BYTES_C-1 downto 0) := + v.accKeep(MST_BYTES_C-1 downto 0); + v.obMaster.tValid := '1'; + v.obMaster.tLast := '1'; + v.count := 0; + v.tUserSet := false; + v.accData := (others => '0'); + v.accKeep := (others => '0'); + + -- Still accumulating else - v.obMaster.tLast := '0'; - end if; - -- Set tData in case of forced tLast - if r.tLastOnNext then - v.obMaster.tData := std_logic_vector(shift_right(unsigned(r.obMaster.tData), MST_BYTES_C*8)); - v.obMaster.tKeep := std_logic_vector(shift_right(unsigned(r.obMaster.tKeep), MST_BYTES_C)); - v.obMaster.tLast := '1'; + v.count := total; end if; - v.tUserSet := false; - end if; - end if; - end if; - - - sAxisSlave <= v.ibSlave; - pipeAxisMaster.tData(pipeAxisMaster.tData'length-1 downto MST_BYTES_C*8) <= (others => '0'); - pipeAxisMaster.tData((MST_BYTES_C*8)-1 downto 0) <= r.obMaster.tData((MST_BYTES_C*8)-1 downto 0); - pipeAxisMaster.tKeep(pipeAxisMaster.tKeep'length-1 downto MST_BYTES_C) <= (others => '0'); - pipeAxisMaster.tKeep((MST_BYTES_C)-1 downto 0) <= r.obMaster.tKeep((MST_BYTES_C)-1 downto 0); - pipeAxisMaster.tValid <= r.obMaster.tValid; - pipeAxisMaster.tUser <= r.obMaster.tUser; - pipeAxisMaster.tLast <= r.obMaster.tLast; - - -- Reset + end if; -- sAxisMaster.tValid + end if; -- pendingLast / normal + end if; -- output slot free + + -- Drive registered outputs to pipeline stage + sAxisSlave <= v.ibSlave; + + pipeAxisMaster.tData <= (others => '0'); + pipeAxisMaster.tData(MST_BYTES_C*8-1 downto 0) <= + r.obMaster.tData(MST_BYTES_C*8-1 downto 0); + pipeAxisMaster.tKeep <= (others => '0'); + pipeAxisMaster.tKeep(MST_BYTES_C-1 downto 0) <= + r.obMaster.tKeep(MST_BYTES_C-1 downto 0); + pipeAxisMaster.tValid <= r.obMaster.tValid; + pipeAxisMaster.tUser <= r.obMaster.tUser; + pipeAxisMaster.tLast <= r.obMaster.tLast; + pipeAxisMaster.tDest <= r.obMaster.tDest; + pipeAxisMaster.tId <= r.obMaster.tId; + + -- Synchronous reset if (RST_ASYNC_G = false and axisRst = RST_POLARITY_G) then v := REG_INIT_C; end if; - -- Register the variable for next clock cycle rin <= v; - end process comb; seq : process (axisClk, axisRst) is begin - if (RST_ASYNC_G) and (axisRst = RST_POLARITY_G) then + if RST_ASYNC_G and (axisRst = RST_POLARITY_G) then r <= REG_INIT_C after TPD_G; elsif rising_edge(axisClk) then r <= rin after TPD_G; end if; end process seq; - -- Optional output pipeline registers to ease timing AxiStreamPipeline_1 : entity surf.AxiStreamPipeline generic map ( - TPD_G => TPD_G, - RST_POLARITY_G => RST_POLARITY_G, - RST_ASYNC_G => RST_ASYNC_G, - -- SIDE_BAND_WIDTH_G => SIDE_BAND_WIDTH_G, - PIPE_STAGES_G => PIPE_STAGES_G) + TPD_G => TPD_G, + RST_ASYNC_G => RST_ASYNC_G, + PIPE_STAGES_G => PIPE_STAGES_G) port map ( axisClk => axisClk, axisRst => axisRst, sAxisMaster => pipeAxisMaster, - -- sSideBand => pipeSideBand, sAxisSlave => pipeAxisSlave, mAxisMaster => mAxisMaster, - -- mSideBand => mSideBand, mAxisSlave => mAxisSlave); end architecture rtl; diff --git a/axi/axi-stream/rtl/AxiStreamMon.vhd b/axi/axi-stream/rtl/AxiStreamMon.vhd index 45ce7ab37a..6092a193d2 100755 --- a/axi/axi-stream/rtl/AxiStreamMon.vhd +++ b/axi/axi-stream/rtl/AxiStreamMon.vhd @@ -38,6 +38,7 @@ entity AxiStreamMon is -- Status Interface statusClk : in sl; statusRst : in sl; + frameUpdate : out sl := '0'; -- end-of-frame strobe (only valid when COMMON_CLK_G = true) frameCnt : out slv(63 downto 0); -- units of frames frameSize : out slv(31 downto 0); -- units of Byte frameSizeMax : out slv(31 downto 0); -- units of Byte @@ -56,33 +57,35 @@ architecture rtl of AxiStreamMon is constant TIMEOUT_C : natural := getTimeRatio(AXIS_CLK_FREQ_G, 1.0)-1; type RegType is record - frameSent : sl; - sizeValid : sl; - armed : sl; - tValid : sl; - tKeep : slv(AXI_STREAM_MAX_TKEEP_WIDTH_C-1 downto 0); - updated : sl; - timer : natural range 0 to TIMEOUT_C; - accum : slv(39 downto 0); - bandwidth : slv(39 downto 0); - frameAccum : slv(31 downto 0); - frameSize : slv(31 downto 0); - frameCnt : slv(63 downto 0); + frameSent : sl; + sizeValid : sl; + armed : sl; + tValid : sl; + tKeep : slv(AXI_STREAM_MAX_TKEEP_WIDTH_C-1 downto 0); + updated : sl; + timer : natural range 0 to TIMEOUT_C; + accum : slv(39 downto 0); + frameUpdate : sl; + bandwidth : slv(39 downto 0); + frameAccum : slv(31 downto 0); + frameSize : slv(31 downto 0); + frameCnt : slv(63 downto 0); end record; constant REG_INIT_C : RegType := ( - frameSent => '0', - sizeValid => '0', - armed => '0', - tValid => '0', - tKeep => (others => '0'), - updated => '0', - timer => 0, - accum => (others => '0'), - bandwidth => (others => '0'), - frameAccum => (others => '0'), - frameSize => (others => '0'), - frameCnt => (others => '0')); + frameSent => '0', + sizeValid => '0', + armed => '0', + tValid => '0', + tKeep => (others => '0'), + updated => '0', + timer => 0, + accum => (others => '0'), + frameUpdate => '0', + bandwidth => (others => '0'), + frameAccum => (others => '0'), + frameSize => (others => '0'), + frameCnt => (others => '0')); signal r : RegType := REG_INIT_C; signal rin : RegType; @@ -192,6 +195,17 @@ begin rd_clk => statusClk, dout => frameCnt); + GEN_FRAME_UPDATE : if COMMON_CLK_G generate + RegisterVector_1 : entity surf.RegisterVector + generic map ( + TPD_G => TPD_G, + WIDTH_G => 1) + port map ( + clk => statusClk, + sig_i(0) => r.frameUpdate, + reg_o(0) => frameUpdate); + end generate GEN_FRAME_UPDATE; + comb : process (axisMaster, axisRst, axisSlave, r) is variable v : RegType; begin @@ -199,9 +213,10 @@ begin v := r; -- Reset strobing signals - v.tValid := '0'; - v.updated := '0'; - v.sizeValid := '0'; + v.tValid := '0'; + v.updated := '0'; + v.sizeValid := '0'; + v.frameUpdate := '0'; -- Check for end of frame v.frameSent := axisMaster.tValid and axisMaster.tLast and axisSlave.tReady; @@ -234,12 +249,13 @@ begin -- Check for end of frame if (r.frameSent = '1') then -- Set the flag - v.sizeValid := r.armed; - v.frameSize := v.frameAccum; + v.frameUpdate := r.armed; + v.sizeValid := r.armed; + v.frameSize := v.frameAccum; -- Reset the accumulator - v.frameAccum := (others => '0'); + v.frameAccum := (others => '0'); -- Confirmed that not in the middle of a frame since reset - v.armed := '1'; + v.armed := '1'; end if; end if; diff --git a/devices/Marvell/Sgmii88E1111/lvdsUltraScale/Sgmii88E1111LvdsUltraScale.vhd b/devices/Marvell/Sgmii88E1111/lvdsUltraScale/Sgmii88E1111LvdsUltraScale.vhd index a5ff669184..b1e8d11bc2 100644 --- a/devices/Marvell/Sgmii88E1111/lvdsUltraScale/Sgmii88E1111LvdsUltraScale.vhd +++ b/devices/Marvell/Sgmii88E1111/lvdsUltraScale/Sgmii88E1111LvdsUltraScale.vhd @@ -30,6 +30,7 @@ entity Sgmii88E1111LvdsUltraScale is JUMBO_G : boolean := true; EN_AXIL_REG_G : boolean := false; PHY_G : natural range 0 to 31 := 7; + ROCEV2_EN_G : boolean := false; AXIS_CONFIG_G : AxiStreamConfigType := EMAC_AXIS_CONFIG_C); port ( -- clock and reset @@ -192,6 +193,7 @@ begin generic map ( TPD_G => TPD_G, PAUSE_EN_G => PAUSE_EN_G, + ROCEV2_EN_G => ROCEV2_EN_G, JUMBO_G => JUMBO_G, EN_AXIL_REG_G => EN_AXIL_REG_G, AXIS_CONFIG_G => AXIS_CONFIG_G) diff --git a/ethernet/EthMacCore/rtl/EthMacRx.vhd b/ethernet/EthMacCore/rtl/EthMacRx.vhd index 812fe1e4c9..ed49fdb11a 100755 --- a/ethernet/EthMacCore/rtl/EthMacRx.vhd +++ b/ethernet/EthMacCore/rtl/EthMacRx.vhd @@ -155,7 +155,7 @@ begin -- RoCEv2 Protocol iCRC Checking -------------------------------- GEN_RoCEv2 : if (ROCEV2_EN_G = true) generate - U_RoCEv2 : entity surf.EthMacRxRoCEv2 + U_RoCEv2 : entity surf.RoCEv2EthMacRx generic map ( TPD_G => TPD_G, RST_POLARITY_G => RST_POLARITY_G) diff --git a/ethernet/IpV4Engine/rtl/IpV4Engine.vhd b/ethernet/IpV4Engine/rtl/IpV4Engine.vhd index d34afd0eb1..17f28c8011 100755 --- a/ethernet/IpV4Engine/rtl/IpV4Engine.vhd +++ b/ethernet/IpV4Engine/rtl/IpV4Engine.vhd @@ -22,16 +22,18 @@ use surf.EthMacPkg.all; entity IpV4Engine is generic ( - TPD_G : time := 1 ns; -- Simulation parameter only - RST_POLARITY_G : sl := '1'; -- '1' for active HIGH reset, '0' for active LOW reset - RST_ASYNC_G : boolean := false; - PROTOCOL_SIZE_G : positive := 1; -- Default to 1x protocol - PROTOCOL_G : Slv8Array := (0 => UDP_C); -- Default to UDP protocol - CLIENT_SIZE_G : positive := 1; -- Sets the number of attached client engines - CLK_FREQ_G : real := 156.25E+06; -- In units of Hz - TTL_G : slv(7 downto 0) := x"20"; - IGMP_G : boolean := false; - IGMP_GRP_SIZE : positive := 1); + TPD_G : time := 1 ns; -- Simulation parameter only + RST_POLARITY_G : sl := '1'; -- '1' for active HIGH reset, '0' for active LOW reset + RST_ASYNC_G : boolean := false; + PROTOCOL_SIZE_G : positive := 1; -- Default to 1x protocol + PROTOCOL_G : Slv8Array := (0 => UDP_C); -- Default to UDP protocol + CLIENT_SIZE_G : positive := 1; -- Sets the number of attached client engines + CLK_FREQ_G : real := 156.25E+06; -- In units of Hz + TTL_G : slv(7 downto 0) := x"20"; + DSCP_G : natural range 0 to 63 := 0; + ECN_G : slv(1 downto 0) := "00"; + IGMP_G : boolean := false; + IGMP_GRP_SIZE : positive := 1); port ( -- Local Configurations localMac : in slv(47 downto 0); -- big-Endian configuration @@ -187,6 +189,8 @@ begin RST_ASYNC_G => RST_ASYNC_G, PROTOCOL_SIZE_G => PROTOCOL_SIZE_C, PROTOCOL_G => PROTOCOL_C, + DSCP_G => DSCP_G, + ECN_G => ECN_G, TTL_G => TTL_G) port map ( -- Local Configurations diff --git a/ethernet/IpV4Engine/rtl/IpV4EngineTx.vhd b/ethernet/IpV4Engine/rtl/IpV4EngineTx.vhd index f339cde2db..32f7bc8e3e 100755 --- a/ethernet/IpV4Engine/rtl/IpV4EngineTx.vhd +++ b/ethernet/IpV4Engine/rtl/IpV4EngineTx.vhd @@ -26,12 +26,14 @@ use surf.EthMacPkg.all; entity IpV4EngineTx is generic ( - TPD_G : time := 1 ns; - RST_POLARITY_G : sl := '1'; -- '1' for active HIGH reset, '0' for active LOW reset - RST_ASYNC_G : boolean := false; - PROTOCOL_SIZE_G : positive := 1; - PROTOCOL_G : Slv8Array := (0 => UDP_C); - TTL_G : slv(7 downto 0) := x"20"); + TPD_G : time := 1 ns; + RST_POLARITY_G : sl := '1'; -- '1' for active HIGH reset, '0' for active LOW reset + RST_ASYNC_G : boolean := false; + PROTOCOL_SIZE_G : positive := 1; + PROTOCOL_G : Slv8Array := (0 => UDP_C); + DSCP_G : natural range 0 to 63 := 0; + ECN_G : slv(1 downto 0) := "00"; + TTL_G : slv(7 downto 0) := x"20"); port ( -- Local Configurations localMac : in slv(47 downto 0); -- big-Endian configuration @@ -158,7 +160,8 @@ begin v.txMaster.tData(95 downto 48) := localMac; v.txMaster.tData(111 downto 96) := IPV4_TYPE_C; v.txMaster.tData(119 downto 112) := x"45"; -- IPVersion = 4,Header length = 5 - v.txMaster.tData(127 downto 120) := x"00"; --- DSCP and ECN + v.txMaster.tData(127 downto 122) := toSlv(DSCP_G, 6); --- DSCP + v.txMaster.tData(121 downto 120) := ECN_G; --- ECN -- Track the leftovers v.tData(63 downto 0) := rxMaster.tData(127 downto 64); -- Next state diff --git a/ethernet/RoCEv2/blue-rdma/mkAxisTransportLayer.v b/ethernet/RoCEv2/blue-rdma/mkAxisTransportLayer.v index dab26d35f2..7a57a394eb 100644 --- a/ethernet/RoCEv2/blue-rdma/mkAxisTransportLayer.v +++ b/ethernet/RoCEv2/blue-rdma/mkAxisTransportLayer.v @@ -1,22 +1,2858 @@ -/* - * ------------------------------------------------------------------- - * This Verilog file has been automatically generated from a core originally written - * in Bluespec SystemVerilog (BSV). The original source code can be found at: - * - * Repository: https://github.com/datenlord/blue-rdma - * Author: DatenLord (https://datenlord.github.io/) - * - * Modifications have been made to the original core before compiling the Verilog. - * For any questions or further information regarding the modifications, please - * feel free to contact me. - * - * Modifications by: Filippo Marini - * Email: filippo.marini@pd.infn.it - * ------------------------------------------------------------------- - */ -// -// Generated by Bluespec Compiler, version 2023.01 (build 52adafa) // +// Generated by Bluespec Compiler, version 2023.01 (build 52adafa5) +// +// On Mon Apr 13 13:07:51 CEST 2026 +// +// Method conflict info: +// Method: rawWorkReqIn_validData +// Conflict-free: rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// Conflicts: rawWorkReqIn_validData +// +// Method: rawWorkReqIn_ready +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawRdmaDataStreamIn_validData +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// Conflicts: rawRdmaDataStreamIn_validData +// +// Method: rawRdmaDataStreamIn_ready +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawRdmaDataStreamOut_valid +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawRdmaDataStreamOut_data +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawRdmaDataStreamOut_byteEn +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawRdmaDataStreamOut_isFirst +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawRdmaDataStreamOut_isLast +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawRdmaDataStreamOut_ready +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// Conflicts: rawRdmaDataStreamOut_ready +// +// Method: rawWorkCompSQOut_valid +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_id +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_opcode +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_flags +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_status +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_len +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_pKey +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_qpn +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_immDt +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_rkey2Inv +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawWorkCompSQOut_ready +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// Conflicts: rawWorkCompSQOut_ready +// +// Method: rawMetaDataStreamIn_validData +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// Conflicts: rawMetaDataStreamIn_validData +// +// Method: rawMetaDataStreamIn_ready +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawMetaDataStreamOut_valid +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawMetaDataStreamOut_metaDataResp +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawMetaDataStreamOut_ready +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// Conflicts: rawMetaDataStreamOut_ready +// +// Method: rawDmaReadCltStreamOut_valid +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawDmaReadCltStreamOut_initiator +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawDmaReadCltStreamOut_sqpn +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawDmaReadCltStreamOut_wrID +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawDmaReadCltStreamOut_startAddr +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawDmaReadCltStreamOut_len +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawDmaReadCltStreamOut_mrIdx +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: rawDmaReadCltStreamOut_ready +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// Conflicts: rawDmaReadCltStreamOut_ready +// +// Method: rawDmaReadCltStreamIn_validData +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// Conflicts: rawDmaReadCltStreamIn_validData +// +// Method: rawDmaReadCltStreamIn_ready +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// Method: cnpReceived +// Conflict-free: rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived +// +// BVI format method schedule info: +// schedule rawWorkReqIn_validData CF ( rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// schedule rawWorkReqIn_validData C ( rawWorkReqIn_validData ); +// +// schedule rawWorkReqIn_ready CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawRdmaDataStreamIn_validData CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// schedule rawRdmaDataStreamIn_validData C ( rawRdmaDataStreamIn_validData ); +// +// schedule rawRdmaDataStreamIn_ready CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawRdmaDataStreamOut_valid CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawRdmaDataStreamOut_data CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawRdmaDataStreamOut_byteEn CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawRdmaDataStreamOut_isFirst CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawRdmaDataStreamOut_isLast CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawRdmaDataStreamOut_ready CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// schedule rawRdmaDataStreamOut_ready C ( rawRdmaDataStreamOut_ready ); +// +// schedule rawWorkCompSQOut_valid CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_id CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_opcode CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_flags CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_status CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_len CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_pKey CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_qpn CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_immDt CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_rkey2Inv CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawWorkCompSQOut_ready CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// schedule rawWorkCompSQOut_ready C ( rawWorkCompSQOut_ready ); +// +// schedule rawMetaDataStreamIn_validData CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// schedule rawMetaDataStreamIn_validData C ( rawMetaDataStreamIn_validData ); +// +// schedule rawMetaDataStreamIn_ready CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawMetaDataStreamOut_valid CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawMetaDataStreamOut_metaDataResp CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawMetaDataStreamOut_ready CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// schedule rawMetaDataStreamOut_ready C ( rawMetaDataStreamOut_ready ); +// +// schedule rawDmaReadCltStreamOut_valid CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawDmaReadCltStreamOut_initiator CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawDmaReadCltStreamOut_sqpn CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawDmaReadCltStreamOut_wrID CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawDmaReadCltStreamOut_startAddr CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawDmaReadCltStreamOut_len CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawDmaReadCltStreamOut_mrIdx CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule rawDmaReadCltStreamOut_ready CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// schedule rawDmaReadCltStreamOut_ready C ( rawDmaReadCltStreamOut_ready ); +// +// schedule rawDmaReadCltStreamIn_validData CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// schedule rawDmaReadCltStreamIn_validData C ( rawDmaReadCltStreamIn_validData ); +// +// schedule rawDmaReadCltStreamIn_ready CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); +// +// schedule cnpReceived CF ( rawWorkReqIn_validData, +// rawWorkReqIn_ready, +// rawRdmaDataStreamIn_validData, +// rawRdmaDataStreamIn_ready, +// rawRdmaDataStreamOut_valid, +// rawRdmaDataStreamOut_data, +// rawRdmaDataStreamOut_byteEn, +// rawRdmaDataStreamOut_isFirst, +// rawRdmaDataStreamOut_isLast, +// rawRdmaDataStreamOut_ready, +// rawWorkCompSQOut_valid, +// rawWorkCompSQOut_id, +// rawWorkCompSQOut_opcode, +// rawWorkCompSQOut_flags, +// rawWorkCompSQOut_status, +// rawWorkCompSQOut_len, +// rawWorkCompSQOut_pKey, +// rawWorkCompSQOut_qpn, +// rawWorkCompSQOut_immDt, +// rawWorkCompSQOut_rkey2Inv, +// rawWorkCompSQOut_ready, +// rawMetaDataStreamIn_validData, +// rawMetaDataStreamIn_ready, +// rawMetaDataStreamOut_valid, +// rawMetaDataStreamOut_metaDataResp, +// rawMetaDataStreamOut_ready, +// rawDmaReadCltStreamOut_valid, +// rawDmaReadCltStreamOut_initiator, +// rawDmaReadCltStreamOut_sqpn, +// rawDmaReadCltStreamOut_wrID, +// rawDmaReadCltStreamOut_startAddr, +// rawDmaReadCltStreamOut_len, +// rawDmaReadCltStreamOut_mrIdx, +// rawDmaReadCltStreamOut_ready, +// rawDmaReadCltStreamIn_validData, +// rawDmaReadCltStreamIn_ready, +// cnpReceived ); // // // Ports: @@ -49,6 +2885,7 @@ // m_dma_read_len O 13 reg // m_dma_read_mr_idx O 1 reg // s_dma_read_ready O 1 reg +// cnp_received O 1 reg // CLK I 1 clock // RST_N I 1 reset // s_work_req_valid I 1 @@ -204,7 +3041,9 @@ module mkAxiSTransportLayer(CLK, s_dma_read_is_resp_err, s_dma_read_data_stream, - s_dma_read_ready); + s_dma_read_ready, + + cnp_received); input CLK; input RST_N; @@ -343,6 +3182,9 @@ module mkAxiSTransportLayer(CLK, // value method rawDmaReadCltStreamIn_ready output s_dma_read_ready; + // value method cnpReceived + output cnp_received; + // signals for module outputs wire [275 : 0] m_meta_data_tdata; wire [255 : 0] m_data_stream_tdata; @@ -356,7 +3198,8 @@ module mkAxiSTransportLayer(CLK, wire [6 : 0] m_work_comp_sq_flags; wire [4 : 0] m_work_comp_sq_status; wire [3 : 0] m_dma_read_initiator; - wire m_data_stream_tfirst, + wire cnp_received, + m_data_stream_tfirst, m_data_stream_tlast, m_data_stream_tvalid, m_dma_read_mr_idx, @@ -488,7 +3331,8 @@ module mkAxiSTransportLayer(CLK, transportLayer_RDY_srvPortMetaData_response_get, transportLayer_RDY_workCompPipeOutSQ_deq, transportLayer_RDY_workCompPipeOutSQ_first, - transportLayer_RDY_workReqInput_put; + transportLayer_RDY_workReqInput_put, + transportLayer_cnpReceived; // rule scheduling signals wire CAN_FIRE_RL_rawDmaReadCltStreamMst_rawBus_mkConnectionGetPut, @@ -669,6 +3513,9 @@ module mkAxiSTransportLayer(CLK, // value method rawDmaReadCltStreamIn_ready assign s_dma_read_ready = rawDmaReadCltStreamSlv_rawBus_fifo_FULL_N ; + // value method cnpReceived + assign cnp_received = transportLayer_cnpReceived ; + // submodule rawDmaReadCltStreamMst_rawBus_fifo FIFO2 #(.width(32'd170), .guarded(1'd1)) rawDmaReadCltStreamMst_rawBus_fifo(.RST(RST_N), @@ -797,7 +3644,8 @@ module mkAxiSTransportLayer(CLK, .RDY_srvPortMetaData_response_get(transportLayer_RDY_srvPortMetaData_response_get), .dmaReadClt_request_get(transportLayer_dmaReadClt_request_get), .RDY_dmaReadClt_request_get(transportLayer_RDY_dmaReadClt_request_get), - .RDY_dmaReadClt_response_put(transportLayer_RDY_dmaReadClt_response_put)); + .RDY_dmaReadClt_response_put(transportLayer_RDY_dmaReadClt_response_put), + .cnpReceived(transportLayer_cnpReceived)); // rule RL_rawWorkReqSlv_rawBus_mkConnectionGetPut assign CAN_FIRE_RL_rawWorkReqSlv_rawBus_mkConnectionGetPut = diff --git a/ethernet/RoCEv2/blue-rdma/mkQP.v b/ethernet/RoCEv2/blue-rdma/mkQP.v index 4d183e9513..6e986c581a 100644 --- a/ethernet/RoCEv2/blue-rdma/mkQP.v +++ b/ethernet/RoCEv2/blue-rdma/mkQP.v @@ -1,23 +1,3489 @@ -/* - * ------------------------------------------------------------------- - * This Verilog file has been automatically generated from a core originally written - * in Bluespec SystemVerilog (BSV). The original source code can be found at: - * - * Repository: https://github.com/datenlord/blue-rdma - * Author: DatenLord (https://datenlord.github.io/) - * - * Modifications have been made to the original core before compiling the Verilog. - * For any questions or further information regarding the modifications, please - * feel free to contact me. - * - * Modifications by: Filippo Marini - * Email: filippo.marini@pd.infn.it - * ------------------------------------------------------------------- - */ // -// Generated by Bluespec Compiler, version 2023.01 (build 52adafa) +// Generated by Bluespec Compiler, version 2023.01 (build 52adafa5) +// +// On Mon Apr 13 13:07:25 CEST 2026 +// +// Method conflict info: +// Method: srvPortQP_request_put +// Conflict-free: srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Conflicts: srvPortQP_request_put +// +// Method: srvPortQP_response_get +// Conflict-free: srvPortQP_request_put, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Conflicts: srvPortQP_response_get +// +// Method: workReqIn_put +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Conflicts: workReqIn_put +// +// Method: dmaReadClt4SQ_request_get +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Conflicts: dmaReadClt4SQ_request_get +// +// Method: dmaReadClt4SQ_response_put +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Conflicts: dmaReadClt4SQ_response_put +// +// Method: respPktPipeIn_pktMetaData_put +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Conflicts: respPktPipeIn_pktMetaData_put +// +// Method: respPktPipeIn_payload_put +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Conflicts: respPktPipeIn_payload_put +// +// Method: statusSQ_comm_isCreate +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isERR +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isInit +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isReset +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isRTR +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isRTS +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isSQD +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isNonErr +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isUnknown +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isRTR2RTS +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_isStableRTS +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getAccessFlags +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getMaxRnrCnt +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getMaxRetryCnt +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getMinRnrTimer +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getMaxTimeOut +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getPendingWorkReqNum +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getPendingRecvReqNum +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getPendingReadAtomicReqNum +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getPendingDestReadAtomicReqNum +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getSigAll +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getSQPN +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getDQPN +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getPKEY +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getQKEY +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_comm_getPMTU +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_getTypeQP +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: statusSQ_isSQ +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// +// Method: rdmaReqPipeOut_first +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Sequenced before: rdmaReqPipeOut_deq +// +// Method: rdmaReqPipeOut_deq +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Sequenced after: rdmaReqPipeOut_first, rdmaReqPipeOut_notEmpty +// Conflicts: rdmaReqPipeOut_deq +// +// Method: rdmaReqPipeOut_notEmpty +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty +// Sequenced before: rdmaReqPipeOut_deq +// +// Method: workCompPipeOutSQ_first +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_notEmpty +// Sequenced before: workCompPipeOutSQ_deq +// +// Method: workCompPipeOutSQ_deq +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty +// Sequenced after: workCompPipeOutSQ_first, workCompPipeOutSQ_notEmpty +// Conflicts: workCompPipeOutSQ_deq +// +// Method: workCompPipeOutSQ_notEmpty +// Conflict-free: srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_notEmpty +// Sequenced before: workCompPipeOutSQ_deq +// +// BVI format method schedule info: +// schedule srvPortQP_request_put CF ( srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule srvPortQP_request_put C ( srvPortQP_request_put ); +// +// schedule srvPortQP_response_get CF ( srvPortQP_request_put, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule srvPortQP_response_get C ( srvPortQP_response_get ); +// +// schedule workReqIn_put CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule workReqIn_put C ( workReqIn_put ); +// +// schedule dmaReadClt4SQ_request_get CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule dmaReadClt4SQ_request_get C ( dmaReadClt4SQ_request_get ); +// +// schedule dmaReadClt4SQ_response_put CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule dmaReadClt4SQ_response_put C ( dmaReadClt4SQ_response_put ); +// +// schedule respPktPipeIn_pktMetaData_put CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule respPktPipeIn_pktMetaData_put C ( respPktPipeIn_pktMetaData_put ); +// +// schedule respPktPipeIn_payload_put CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule respPktPipeIn_payload_put C ( respPktPipeIn_payload_put ); +// +// schedule statusSQ_comm_isCreate CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isERR CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isInit CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isReset CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isRTR CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isRTS CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isSQD CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isNonErr CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isUnknown CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isRTR2RTS CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_isStableRTS CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getAccessFlags CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getMaxRnrCnt CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getMaxRetryCnt CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getMinRnrTimer CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getMaxTimeOut CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getPendingWorkReqNum CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getPendingRecvReqNum CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getPendingReadAtomicReqNum CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getPendingDestReadAtomicReqNum CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getSigAll CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getSQPN CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getDQPN CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getPKEY CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getQKEY CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_comm_getPMTU CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_getTypeQP CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule statusSQ_isSQ CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// +// schedule rdmaReqPipeOut_first CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule rdmaReqPipeOut_first SB ( rdmaReqPipeOut_deq ); +// +// schedule rdmaReqPipeOut_deq CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule rdmaReqPipeOut_deq C ( rdmaReqPipeOut_deq ); +// +// schedule rdmaReqPipeOut_notEmpty CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty ); +// schedule rdmaReqPipeOut_notEmpty SB ( rdmaReqPipeOut_deq ); +// +// schedule workCompPipeOutSQ_first CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_notEmpty ); +// schedule workCompPipeOutSQ_first SB ( workCompPipeOutSQ_deq ); +// +// schedule workCompPipeOutSQ_deq CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty ); +// schedule workCompPipeOutSQ_deq C ( workCompPipeOutSQ_deq ); +// +// schedule workCompPipeOutSQ_notEmpty CF ( srvPortQP_request_put, +// srvPortQP_response_get, +// workReqIn_put, +// dmaReadClt4SQ_request_get, +// dmaReadClt4SQ_response_put, +// respPktPipeIn_pktMetaData_put, +// respPktPipeIn_payload_put, +// statusSQ_comm_isCreate, +// statusSQ_comm_isERR, +// statusSQ_comm_isInit, +// statusSQ_comm_isReset, +// statusSQ_comm_isRTR, +// statusSQ_comm_isRTS, +// statusSQ_comm_isSQD, +// statusSQ_comm_isNonErr, +// statusSQ_comm_isUnknown, +// statusSQ_comm_isRTR2RTS, +// statusSQ_comm_isStableRTS, +// statusSQ_comm_getAccessFlags, +// statusSQ_comm_getMaxRnrCnt, +// statusSQ_comm_getMaxRetryCnt, +// statusSQ_comm_getMinRnrTimer, +// statusSQ_comm_getMaxTimeOut, +// statusSQ_comm_getPendingWorkReqNum, +// statusSQ_comm_getPendingRecvReqNum, +// statusSQ_comm_getPendingReadAtomicReqNum, +// statusSQ_comm_getPendingDestReadAtomicReqNum, +// statusSQ_comm_getSigAll, +// statusSQ_comm_getSQPN, +// statusSQ_comm_getDQPN, +// statusSQ_comm_getPKEY, +// statusSQ_comm_getQKEY, +// statusSQ_comm_getPMTU, +// statusSQ_getTypeQP, +// statusSQ_isSQ, +// rdmaReqPipeOut_first, +// rdmaReqPipeOut_deq, +// rdmaReqPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_notEmpty ); +// schedule workCompPipeOutSQ_notEmpty SB ( workCompPipeOutSQ_deq ); // -// On Wed Sep 11 15:19:43 CEST 2024 // // Ports: // Name I/O size props @@ -1791,14 +5257,6 @@ module mkQP(CLK, wire [9 : 0] payloadGenerator4SQ_payloadBufQ_rWrPtr_D_IN; wire payloadGenerator4SQ_payloadBufQ_rWrPtr_EN; - // register rqDmaReadCancelReg - reg rqDmaReadCancelReg; - wire rqDmaReadCancelReg_D_IN, rqDmaReadCancelReg_EN; - - // register rqDmaWriteCancelReg - reg rqDmaWriteCancelReg; - wire rqDmaWriteCancelReg_D_IN, rqDmaWriteCancelReg_EN; - // register sqDmaReadCancelReg reg sqDmaReadCancelReg; wire sqDmaReadCancelReg_D_IN, sqDmaReadCancelReg_EN; @@ -3150,98 +6608,98 @@ module mkQP(CLK, // declarations used by system tasks // synopsys translate_off - reg [63 : 0] v__h3884; - reg [63 : 0] v__h4313; - reg [63 : 0] v__h4717; - reg [63 : 0] v__h5169; - reg [63 : 0] v__h5606; - reg [63 : 0] v__h5829; - reg [63 : 0] v__h6391; - reg [63 : 0] v__h6614; - reg [63 : 0] v__h7317; - reg [63 : 0] v__h9162; - reg [63 : 0] v__h13758; - reg [63 : 0] v__h14296; - reg [63 : 0] v__h43308; - reg [63 : 0] v__h50137; - reg [63 : 0] v__h50289; - reg [63 : 0] v__h50515; - reg [63 : 0] v__h50628; - reg [63 : 0] v__h50773; - reg [63 : 0] v__h54300; - reg [63 : 0] v__h58741; - reg [63 : 0] v__h61335; - reg [63 : 0] v__h63194; - reg [63 : 0] v__h69848; - reg [63 : 0] v__h73012; - reg [63 : 0] v__h48088; - reg [63 : 0] v__h48212; - reg [63 : 0] v__h48664; - reg [63 : 0] v__h93157; - reg [63 : 0] v__h93514; - reg [63 : 0] v__h93774; - reg [63 : 0] v__h57516; - reg [63 : 0] v__h97761; - reg [63 : 0] v__h97941; - reg [63 : 0] v__h98281; - reg [63 : 0] v__h98457; - reg [63 : 0] v__h101559; - reg [63 : 0] v__h101795; - reg [63 : 0] v__h101959; - reg [63 : 0] v__h103981; - reg [63 : 0] v__h104178; - reg [63 : 0] v__h106970; - reg [63 : 0] v__h107194; - reg [63 : 0] v__h107798; - reg [63 : 0] v__h109873; - reg [63 : 0] v__h117067; - reg [63 : 0] v__h117291; - reg [63 : 0] v__h117643; - reg [63 : 0] v__h122840; - reg [63 : 0] v__h36446; - reg [63 : 0] v__h36711; - reg [63 : 0] v__h37491; - reg [63 : 0] v__h38910; - reg [63 : 0] v__h35350; - reg [63 : 0] v__h35692; - reg [63 : 0] v__h35995; - reg [63 : 0] v__h34459; - reg [63 : 0] v__h34954; - reg [63 : 0] v__h98868; - reg [63 : 0] v__h99106; - reg [63 : 0] v__h120515; - reg [63 : 0] v__h29295; - reg [63 : 0] v__h29442; - reg [63 : 0] v__h29608; - reg [63 : 0] v__h29763; - reg [63 : 0] v__h29891; - reg [63 : 0] v__h30076; - reg [63 : 0] v__h30289; - reg [63 : 0] v__h30463; - reg [63 : 0] v__h30613; - reg [63 : 0] v__h24390; - reg [63 : 0] v__h24503; - reg [63 : 0] v__h24769; - reg [63 : 0] v__h24880; - reg [63 : 0] v__h25249; - reg [63 : 0] v__h25475; - reg [63 : 0] v__h43204; - reg [63 : 0] v__h118758; - reg [63 : 0] v__h126312; - reg [63 : 0] v__h3196; - reg [63 : 0] v__h3517; - reg [63 : 0] v__h129863; - reg [63 : 0] v__h130013; - reg [63 : 0] v__h7672; + reg [63 : 0] v__h3822; + reg [63 : 0] v__h4251; + reg [63 : 0] v__h4655; + reg [63 : 0] v__h5107; + reg [63 : 0] v__h5544; + reg [63 : 0] v__h5767; + reg [63 : 0] v__h6329; + reg [63 : 0] v__h6552; + reg [63 : 0] v__h7255; + reg [63 : 0] v__h9100; + reg [63 : 0] v__h13696; + reg [63 : 0] v__h14234; + reg [63 : 0] v__h43246; + reg [63 : 0] v__h50075; + reg [63 : 0] v__h50227; + reg [63 : 0] v__h50453; + reg [63 : 0] v__h50566; + reg [63 : 0] v__h50711; + reg [63 : 0] v__h54238; + reg [63 : 0] v__h58679; + reg [63 : 0] v__h61273; + reg [63 : 0] v__h63132; + reg [63 : 0] v__h69786; + reg [63 : 0] v__h72950; + reg [63 : 0] v__h48026; + reg [63 : 0] v__h48150; + reg [63 : 0] v__h48602; + reg [63 : 0] v__h93095; + reg [63 : 0] v__h93452; + reg [63 : 0] v__h93712; + reg [63 : 0] v__h57454; + reg [63 : 0] v__h97699; + reg [63 : 0] v__h97879; + reg [63 : 0] v__h98219; + reg [63 : 0] v__h98395; + reg [63 : 0] v__h101497; + reg [63 : 0] v__h101733; + reg [63 : 0] v__h101897; + reg [63 : 0] v__h104001; + reg [63 : 0] v__h104198; + reg [63 : 0] v__h106950; + reg [63 : 0] v__h107174; + reg [63 : 0] v__h107778; + reg [63 : 0] v__h109853; + reg [63 : 0] v__h117047; + reg [63 : 0] v__h117271; + reg [63 : 0] v__h117623; + reg [63 : 0] v__h122820; + reg [63 : 0] v__h36384; + reg [63 : 0] v__h36649; + reg [63 : 0] v__h37429; + reg [63 : 0] v__h38848; + reg [63 : 0] v__h35288; + reg [63 : 0] v__h35630; + reg [63 : 0] v__h35933; + reg [63 : 0] v__h34397; + reg [63 : 0] v__h34892; + reg [63 : 0] v__h98806; + reg [63 : 0] v__h99044; + reg [63 : 0] v__h120495; + reg [63 : 0] v__h29233; + reg [63 : 0] v__h29380; + reg [63 : 0] v__h29546; + reg [63 : 0] v__h29701; + reg [63 : 0] v__h29829; + reg [63 : 0] v__h30014; + reg [63 : 0] v__h30227; + reg [63 : 0] v__h30401; + reg [63 : 0] v__h30551; + reg [63 : 0] v__h24328; + reg [63 : 0] v__h24441; + reg [63 : 0] v__h24707; + reg [63 : 0] v__h24818; + reg [63 : 0] v__h25187; + reg [63 : 0] v__h25413; + reg [63 : 0] v__h43142; + reg [63 : 0] v__h118738; + reg [63 : 0] v__h126292; + reg [63 : 0] v__h3134; + reg [63 : 0] v__h3455; + reg [63 : 0] v__h129843; + reg [63 : 0] v__h129993; + reg [63 : 0] v__h7610; // synopsys translate_on // remaining internal signals - reg [511 : 0] CASE_cntrl_sqTypeReg_2_a3239_3_a3239_a3241__q6, - CASE_cntrl_sqTypeReg_2_a3243_3_a3243_a3245__q7, - CASE_cntrl_sqTypeReg_2_a3247_3_a3247_4_a3249_a_ETC__q8, - CASE_cntrl_sqTypeReg_2_a3253_3_a3253_4_a3255_a_ETC__q9, - value__h63238, - value__h69886; + reg [511 : 0] CASE_cntrl_sqTypeReg_2_a3177_3_a3177_a3179__q6, + CASE_cntrl_sqTypeReg_2_a3181_3_a3181_a3183__q7, + CASE_cntrl_sqTypeReg_2_a3185_3_a3185_4_a3187_a_ETC__q8, + CASE_cntrl_sqTypeReg_2_a3191_3_a3191_4_a3193_a_ETC__q9, + value__h63176, + value__h69824; reg [63 : 0] SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d838, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d855, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1463, @@ -3250,11 +6708,11 @@ module mkQP(CLK, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d768, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d786, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d804, - value__h99740, - value__h99767, - x__h39125, - x__h39664; - reg [41 : 0] x__h32835; + value__h99678, + value__h99705, + x__h39063, + x__h39602; + reg [41 : 0] x__h32773; reg [31 : 0] CASE_payloadGenerator4SQ_payloadGenReqQD_OUT__ETC__q1, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d871, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888, @@ -3265,46 +6723,47 @@ module mkQP(CLK, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d792, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d798, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810, - value__h99797, - value__h99824, - value__h99908, - x__h39399; + value__h99735, + value__h99762, + value__h99846, + x__h39337; reg [24 : 0] SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d1650, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d994, - tmpPktNum__h9229, - x__h52242; + tmpPktNum__h9167, + x__h52180; reg [23 : 0] SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d904, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d921, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d961, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d978, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d816, - value__h99854, - value__h99881, - value__h99939, - value__h99966, - x__h6205, - x__h63485; + retryStartPSN__h103743, + value__h99792, + value__h99819, + value__h99877, + value__h99904, + x__h6143, + x__h63423; reg [15 : 0] IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d99; - reg [11 : 0] pmtuResidue__h9230, x__h52371; + reg [11 : 0] pmtuResidue__h9168, x__h52309; reg [10 : 0] IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d155; reg [7 : 0] CASE_sq_workCompGenSQ_pendingWorkCompQ4SQD_OU_ETC__q34, IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d95, - x__h6243; + x__h6181; reg [6 : 0] CASE_cntrl_sqTypeReg_2_12_3_12_4_20_16__q4, CASE_cntrl_sqTypeReg_2_28_3_28_32__q2, - CASE_cntrl_sqTypeReg_2_b3244_3_b3244_b3246__q3, - CASE_cntrl_sqTypeReg_2_b3254_3_b3254_4_24_b3258__q5, - value__h68654, - value__h72405; + CASE_cntrl_sqTypeReg_2_b3182_3_b3182_b3184__q3, + CASE_cntrl_sqTypeReg_2_b3192_3_b3192_4_24_b3196__q5, + value__h68592, + value__h72343; reg [4 : 0] CASE_sq_respHandleSQ_pendingRetryCheckQD_OUT__ETC__q22, CASE_sq_respHandleSQ_pendingRetryCheckQD_OUT__ETC__q23, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d780, - enumBits__h93928; + enumBits__h93866; reg [3 : 0] CASE_sq_respHandleSQ_incomingRespQD_OUT_BITS__ETC__q28, - CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32, + CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31, IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d60, IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4298, IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4302, @@ -3315,7 +6774,7 @@ module mkQP(CLK, reg [1 : 0] CASE_respPktPipe_metaDataQD_OUT_BITS_527_TO_5_ETC__q29, CASE_respPktPipe_metaDataQD_OUT_BITS_529_TO_5_ETC__q30, CASE_sq_respHandleSQ_pendingRetryCheckQD_OUT__ETC__q24, - CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31, + CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32, IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4308, IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4312; reg CASE_sq_reqGenSQ_reqHeaderPrepareQD_OUT_BITS__ETC__q18, @@ -3338,7 +6797,7 @@ module mkQP(CLK, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d2711, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d2722, IF_sq_respHandleSQ_pendingRespQ_first__787_BIT_ETC___d4824, - IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d4989, + IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d4995, IF_sq_respHandleSQ_preStageRespAndWorkReqRelat_ETC___d4271, IF_sq_respHandleSQ_preStageRespAndWorkReqRelat_ETC___d4275, SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473, @@ -3396,109 +6855,109 @@ module mkQP(CLK, wire [520 : 0] IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3420; wire [511 : 0] IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_cntrl__ETC___d3311, IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_sq_req_ETC___d3316, - a__h63239, - a__h63241, - a__h63243, - a__h63245, - a__h63247, - a__h63249, - a__h63251, - a__h63253, - a__h63255, - a__h63257, - a__h63259, - a__h63261, - a__h63269, - a__h63272, - a__h69887, - a__h69889, - a__h69891, - a__h69893, - a__h69903, - a__h69905, - leftShiftHeaderData__h47318, - tmpData__h49087, - x__h47525, - x__h74169; - wire [255 : 0] leftShiftData__h49541, - rightShiftHeaderLastFragData__h48757, - x__read_data__h12578; + a__h63177, + a__h63179, + a__h63181, + a__h63183, + a__h63185, + a__h63187, + a__h63189, + a__h63191, + a__h63193, + a__h63195, + a__h63197, + a__h63199, + a__h63207, + a__h63210, + a__h69825, + a__h69827, + a__h69829, + a__h69831, + a__h69841, + a__h69843, + leftShiftHeaderData__h47256, + tmpData__h49025, + x__h47463, + x__h74107; + wire [255 : 0] leftShiftData__h49479, + rightShiftHeaderLastFragData__h48695, + x__read_data__h12516; wire [77 : 0] NOT_sq_retryHandler_retryReasonReg_431_EQ_4_46_ETC___d1656, sq_reqGenSQ_workReqPsnQ_first__498_BIT_4_499_O_ETC___d2558; wire [63 : 0] _1_SL_sq_reqGenSQ_pendingReqHeaderQ_first__424__ETC___d3443, - leftShiftHeaderByteEn__h47319, - tmpByteEn__h49088, - x__h47528; - wire [41 : 0] x__h33715; + leftShiftHeaderByteEn__h47257, + tmpByteEn__h49026, + x__h47466; + wire [41 : 0] x__h33653; wire [31 : 0] _1_SL_IF_payloadGenerator4SQ_payloadGenReqQ_fir_ETC___d577, - leftShiftByteEn__h49542, + leftShiftByteEn__h49480, payloadGenerator4SQ_bramQ2PipeOut_postBramQ_fi_ETC___d1852, - rightShiftHeaderLastFragByteEn__h48758, - x__h14424, - x__read_byteEn__h12579, - y_avValue_byteEn__h17055; - wire [24 : 0] _theResult___snd__h61670, - a__h52253, - a__h52263, - a__h52273, - a__h52283, - a__h52293, - a__h9345, - a__h9355, - a__h9365, - a__h9375, - a__h9385, - remainingPktNum___1__h61681, - remainingPktNum___1__h61739, - totalPktNum__h55209, - x__h37628, - x__h56223; - wire [23 : 0] curPSN__h61636, - endPktSeqNum__h56057, - nextPktSeqNum__h56056, - startPlusOne__h56122, - v__h37423, - x__h56104; + rightShiftHeaderLastFragByteEn__h48696, + x__h14362, + x__read_byteEn__h12517, + y_avValue_byteEn__h16993; + wire [24 : 0] _theResult___snd__h61608, + a__h52191, + a__h52201, + a__h52211, + a__h52221, + a__h52231, + a__h9283, + a__h9293, + a__h9303, + a__h9313, + a__h9323, + remainingPktNum___1__h61619, + remainingPktNum___1__h61677, + totalPktNum__h55147, + x__h37566, + x__h56161; + wire [23 : 0] curPSN__h61574, + endPktSeqNum__h55995, + nextPktSeqNum__h55994, + startPlusOne__h56060, + v__h37361, + x__h56042; wire [16 : 0] IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1770, sq_reqGenSQ_pendingReqHeaderQ_first__424_BITS__ETC___d3563; - wire [12 : 0] addrChunkResp_chunkLen__h10586, - sq_respHandleSQ_pendingRetryCheckQ_first__949__ETC___d5187; - wire [11 : 0] b__h52254, - b__h52264, - b__h52274, - b__h52284, - b__h9346, - b__h9356, - b__h9366, - b__h9376; - wire [9 : 0] x__h12662, x__h12913; - wire [8 : 0] headerLastFragValidBitNum__h47980; - wire [7 : 0] x__h16825, x__h41815, x__h41903, y__h42773; + wire [12 : 0] addrChunkResp_chunkLen__h10524, + sq_respHandleSQ_pendingRetryCheckQ_first__955__ETC___d5193; + wire [11 : 0] b__h52192, + b__h52202, + b__h52212, + b__h52222, + b__h9284, + b__h9294, + b__h9304, + b__h9314; + wire [9 : 0] x__h12600, x__h12851; + wire [8 : 0] headerLastFragValidBitNum__h47918; + wire [7 : 0] x__h16763, x__h41753, x__h41841, y__h42711; wire [6 : 0] IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_12_ELSE_16___d3346, IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_sq_req_ETC___d3349, - b__h63244, - b__h63246, - b__h63254, - b__h63258, - b__h69892, - b__h69894, - remainingHeaderLen__h47316, - x__h81436; - wire [5 : 0] headerLastFragInvalidByteNum__h47982, - lastFragValidByteNumWithPadding__h13828, - lastFragValidByteNum__h13827, - lastFragValidByteNum__h13849, - lastFragValidByteNum__h87658; - wire [4 : 0] rnrTimer__h36783; - wire [2 : 0] x__h35617, x__h35647; + b__h63182, + b__h63184, + b__h63192, + b__h63196, + b__h69830, + b__h69832, + remainingHeaderLen__h47254, + x__h81374; + wire [5 : 0] headerLastFragInvalidByteNum__h47920, + lastFragValidByteNumWithPadding__h13766, + lastFragValidByteNum__h13765, + lastFragValidByteNum__h13787, + lastFragValidByteNum__h87596; + wire [4 : 0] rnrTimer__h36721; + wire [2 : 0] x__h35555, x__h35585; wire [1 : 0] IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1737, - IF_sq_retryHandler_retryRespQ_first__023_THEN__ETC___d5182, - bits__h49179, - bth_padCnt__h63283, - bth_padCnt__h69915, - padCnt__h13826, - padCnt__h63476, - remainingHeaderFragNum__h47317; + IF_sq_retryHandler_retryRespQ_first__029_THEN__ETC___d5188, + bits__h49117, + bth_padCnt__h63221, + bth_padCnt__h69853, + padCnt__h13764, + padCnt__h63414, + remainingHeaderFragNum__h47255; wire IF_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_ETC___d1515, IF_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_ETC___d4106, IF_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_ETC___d4116, @@ -3521,12 +6980,12 @@ module mkQP(CLK, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d2724, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d2730, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d2734, - IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__69_ETC___d5707, + IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__70_ETC___d5713, IF_sq_respHandleSQ_pendingRespQ_first__787_BIT_ETC___d4844, - IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5037, + IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5043, IF_sq_retryHandler_resetTimeOutQ_notEmpty__176_ETC___d1197, IF_sq_retryHandler_updateRetryCntQ_first__309__ETC___d1340, - IF_sq_workCompGenSQ_genWorkCompQ_first__802_BI_ETC___d5808, + IF_sq_workCompGenSQ_genWorkCompQ_first__808_BI_ETC___d5814, NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2524, NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2536, NOT_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVe_ETC___d1503, @@ -3616,11 +7075,11 @@ module mkQP(CLK, __duses991, __duses996, __duses999, - cntrl_stateReg_EQ_3_AND_NOT_sq_respHandleSQ_re_ETC___d5647, + cntrl_stateReg_EQ_3_AND_NOT_sq_respHandleSQ_re_ETC___d5653, cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_preSta_ETC___d3624, cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_preSta_ETC___d4329, - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_recvEr_ETC___d5683, - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690, + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_recvEr_ETC___d5689, + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696, dmaReadCntrl4SQ_addrChunkSrv_pktNumReg_77_BITS_ETC___d366, dmaReadCntrl4SQ_respQ_i_notEmpty__42_AND_NOT_d_ETC___d657, payloadGenerator4SQ_payloadBufQ_rRdPtr_read__7_ETC___d487, @@ -3630,7 +7089,7 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAnd_ETC___d1747, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAnd_ETC___d1808, sq_reqGenSQ_workReqCheckQ_i_notEmpty__561_AND__ETC___d2573, - sq_respHandleSQ_pendingRetryCheckQ_first__949__ETC___d5046, + sq_respHandleSQ_pendingRetryCheckQ_first__955__ETC___d5052, sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4187, sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4200, sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4203, @@ -3645,8 +7104,8 @@ module mkQP(CLK, sq_retryHandler_resetReqQ_i_notEmpty__149_AND__ETC___d1155, sq_retryHandler_resetTimeOutQ_notEmpty__176_OR_ETC___d1209, sq_retryHandler_updateRetryCntQ_i_notEmpty__30_ETC___d1313, - sq_workCompGenSQ_dmaWaitingQ_i_notFull__721_AN_ETC___d5767, - x__h87589; + sq_workCompGenSQ_dmaWaitingQ_i_notFull__727_AN_ETC___d5773, + x__h87527; // action method srvPortQP_request_put assign RDY_srvPortQP_request_put = cntrl_reqQ_FULL_N ; @@ -4703,8 +8162,6 @@ module mkQP(CLK, cntrl_stateReg == 4'd6 && !cntrl_errFlushDoneReg && !workReqQ_EMPTY_N && sq_pendingWorkReqBuf_emptyReg && - rqDmaReadCancelReg && - rqDmaWriteCancelReg && sqDmaReadCancelReg && dmaReadCntrl4SQ_gracefulStopReg ; assign WILL_FIRE_RL_waitGracefulStop = CAN_FIRE_RL_waitGracefulStop ; @@ -4950,7 +8407,7 @@ module mkQP(CLK, sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_incrQ_FULL_N && cntrl_stateReg == 4'd3 && sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg < - y__h42773 ; + y__h42711 ; assign WILL_FIRE_RL_sq_newPendingWorkReqPiptOut_genPendingWR = CAN_FIRE_RL_sq_newPendingWorkReqPiptOut_genPendingWR ; @@ -5229,7 +8686,7 @@ module mkQP(CLK, assign CAN_FIRE_RL_sq_respHandleSQ_checkRetryErr = sq_respHandleSQ_pendingRetryCheckQ_EMPTY_N && sq_respHandleSQ_pendingPermCheckQ_FULL_N && - sq_respHandleSQ_pendingRetryCheckQ_first__949__ETC___d5046 && + sq_respHandleSQ_pendingRetryCheckQ_first__955__ETC___d5052 && (cntrl_stateReg == 4'd3 || cntrl_stateReg == 4'd6) ; assign WILL_FIRE_RL_sq_respHandleSQ_checkRetryErr = CAN_FIRE_RL_sq_respHandleSQ_checkRetryErr ; @@ -5286,7 +8743,7 @@ module mkQP(CLK, assign CAN_FIRE_RL_sq_respHandleSQ_discardGhostResp = respPktPipe_metaDataQ_EMPTY_N && sq_respHandleSQ_incomingRespQ_FULL_N && - cntrl_stateReg_EQ_3_AND_NOT_sq_respHandleSQ_re_ETC___d5647 && + cntrl_stateReg_EQ_3_AND_NOT_sq_respHandleSQ_re_ETC___d5653 && sq_pendingWorkReqBuf_emptyReg ; assign WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp = CAN_FIRE_RL_sq_respHandleSQ_discardGhostResp ; @@ -5294,7 +8751,7 @@ module mkQP(CLK, // rule RL_sq_respHandleSQ_checkTimeOutErr assign CAN_FIRE_RL_sq_respHandleSQ_checkTimeOutErr = sq_retryHandler_timeOutNotificationQ_EMPTY_N && - cntrl_stateReg_EQ_3_AND_NOT_sq_respHandleSQ_re_ETC___d5647 ; + cntrl_stateReg_EQ_3_AND_NOT_sq_respHandleSQ_re_ETC___d5653 ; assign WILL_FIRE_RL_sq_respHandleSQ_checkTimeOutErr = CAN_FIRE_RL_sq_respHandleSQ_checkTimeOutErr ; @@ -5308,7 +8765,7 @@ module mkQP(CLK, assign CAN_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp = respPktPipe_metaDataQ_EMPTY_N && sq_respHandleSQ_incomingRespQ_FULL_N && - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_recvEr_ETC___d5683 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_recvEr_ETC___d5689 ; assign WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp = CAN_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp ; @@ -5316,7 +8773,7 @@ module mkQP(CLK, assign CAN_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload = (!respPktPipe_metaDataQ_EMPTY_N || sq_respHandleSQ_incomingRespQ_FULL_N) && - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload = CAN_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload ; @@ -5326,9 +8783,9 @@ module mkQP(CLK, // rule RL_sq_respHandleSQ_retryFlushDone assign CAN_FIRE_RL_sq_respHandleSQ_retryFlushDone = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign WILL_FIRE_RL_sq_respHandleSQ_retryFlushDone = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; // rule RL_sq_retryHandler_initRetry assign CAN_FIRE_RL_sq_retryHandler_initRetry = @@ -5529,7 +8986,7 @@ module mkQP(CLK, // rule RL_sq_workCompGenSQ_recvWorkCompGenReqSQ assign CAN_FIRE_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ = - IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__69_ETC___d5707 && + IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__70_ETC___d5713 && (cntrl_preStateReg == 4'd3 && cntrl_stateReg == 4'd3 && sq_workCompGenSQ_workCompGenStateReg == 2'd1 || cntrl_stateReg == 4'd6 || @@ -5576,7 +9033,7 @@ module mkQP(CLK, // rule RL_sq_workCompGenSQ_genPendingWorkCompSQ assign CAN_FIRE_RL_sq_workCompGenSQ_genPendingWorkCompSQ = sq_workCompGenSQ_pendingWorkCompQ4SQ_EMPTY_N && - sq_workCompGenSQ_dmaWaitingQ_i_notFull__721_AN_ETC___d5767 && + sq_workCompGenSQ_dmaWaitingQ_i_notFull__727_AN_ETC___d5773 && (cntrl_preStateReg == 4'd3 && cntrl_stateReg == 4'd3 && sq_workCompGenSQ_workCompGenStateReg == 2'd1 || cntrl_stateReg == 4'd6 || @@ -5609,7 +9066,7 @@ module mkQP(CLK, // rule RL_sq_workCompGenSQ_genWorkCompSQ assign CAN_FIRE_RL_sq_workCompGenSQ_genWorkCompSQ = sq_workCompGenSQ_genWorkCompQ_EMPTY_N && - IF_sq_workCompGenSQ_genWorkCompQ_first__802_BI_ETC___d5808 && + IF_sq_workCompGenSQ_genWorkCompQ_first__808_BI_ETC___d5814 && cntrl_preStateReg == 4'd3 && cntrl_stateReg == 4'd3 && sq_workCompGenSQ_workCompGenStateReg == 2'd1 ; @@ -5904,13 +9361,13 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[216:213], IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d60, cntrl_reqQ_D_OUT[208:150], - x__h6205, + x__h6143, cntrl_reqQ_D_OUT[125:102], IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d95, cntrl_reqQ_D_OUT[93:54], IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d99, cntrl_reqQ_D_OUT[37], - x__h6243, + x__h6181, cntrl_reqQ_D_OUT[28:16], IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d155, cntrl_reqQ_D_OUT[4:0] } ; @@ -5924,13 +9381,13 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[216:213], IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d60, cntrl_reqQ_D_OUT[208:150], - x__h6205, + x__h6143, cntrl_reqQ_D_OUT[125:102], IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d95, cntrl_reqQ_D_OUT[93:54], IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d99, cntrl_reqQ_D_OUT[37], - x__h6243, + x__h6181, cntrl_reqQ_D_OUT[28:16], IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d155, cntrl_reqQ_D_OUT[4:0] } ; @@ -5984,14 +9441,14 @@ module mkQP(CLK, endcase end assign MUX_dmaReadCntrl4SQ_addrChunkSrv_pktNumReg_write_1__VAL_1 = - tmpPktNum__h9229 + - ((!pmtuResidue__h9230[11] && pmtuResidue__h9230[10:9] == 2'd0 && - !pmtuResidue__h9230[8] && - pmtuResidue__h9230[7:6] == 2'd0 && - !pmtuResidue__h9230[5] && - pmtuResidue__h9230[4:3] == 2'd0 && - !pmtuResidue__h9230[2] && - pmtuResidue__h9230[1:0] == 2'd0) ? + tmpPktNum__h9167 + + ((!pmtuResidue__h9168[11] && pmtuResidue__h9168[10:9] == 2'd0 && + !pmtuResidue__h9168[8] && + pmtuResidue__h9168[7:6] == 2'd0 && + !pmtuResidue__h9168[5] && + pmtuResidue__h9168[4:3] == 2'd0 && + !pmtuResidue__h9168[2] && + pmtuResidue__h9168[1:0] == 2'd0) ? 25'd0 : 25'd1) ; assign MUX_dmaReadCntrl4SQ_addrChunkSrv_pktNumReg_write_1__VAL_2 = @@ -5999,8 +9456,8 @@ module mkQP(CLK, assign MUX_sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg_write_1__VAL_1 = (sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_incrReg_port1__read && !sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_decrReg_port1__read) ? - x__h41815 : - x__h41903 ; + x__h41753 : + x__h41841 ; assign MUX_sq_pendingWorkReqBuf_deqPtrReg_write_1__VAL_1 = sq_pendingWorkReqBuf_popReg_port1__read ? sq_pendingWorkReqBuf_deqPtrReg + 2'd1 : @@ -6025,28 +9482,28 @@ module mkQP(CLK, { 1'd1, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1463, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1521, - enumBits__h93928, - x__h39125, + enumBits__h93866, + x__h39063, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1561, - x__h39399, - x__h39664, + x__h39337, + x__h39602, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621, - value__h99740, + value__h99678, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1624, - value__h99767, + value__h99705, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1626, - value__h99797, + value__h99735, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629, - value__h99824, + value__h99762, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631, - value__h99854, + value__h99792, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1634, - value__h99881, + value__h99819, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636, - value__h99908, + value__h99846, NOT_sq_retryHandler_retryReasonReg_431_EQ_4_46_ETC___d1656 } ; assign MUX_sq_pendingWorkReqBuf_scanAlmostDoneReg_write_1__VAL_1 = sq_pendingWorkReqBuf_itemCnt_Q_OUT[2:1] == 2'd0 && @@ -6072,13 +9529,13 @@ module mkQP(CLK, IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1737 != 2'd1 ; assign MUX_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_dataStreamOutQ_enq_1__VAL_2 = - { tmpData__h49087[255:0], - tmpByteEn__h49088[31:0], + { tmpData__h49025[255:0], + tmpByteEn__h49026[31:0], sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_isFirstReg, payloadGenerator4SQ_bramQ2PipeOut_postBramQ_D_OUT[0] && - bits__h49179 == 2'd0 } ; + bits__h49117 == 2'd0 } ; assign MUX_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_dataStreamOutQ_enq_1__VAL_3 = - { leftShiftData__h49541, leftShiftByteEn__h49542, 2'd1 } ; + { leftShiftData__h49479, leftShiftByteEn__h49480, 2'd1 } ; assign MUX_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerFragCntReg_write_1__VAL_1 = sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerFragCntReg - 2'd1 ; @@ -6088,8 +9545,8 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[9:8] - 2'd1 ; assign MUX_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_preDataStreamReg_write_1__VAL_1 = - { rightShiftHeaderLastFragData__h48757, - rightShiftHeaderLastFragByteEn__h48758, + { rightShiftHeaderLastFragData__h48695, + rightShiftHeaderLastFragByteEn__h48696, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerDataStreamOutQ_D_OUT[1], !sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerHasPayloadReg } ; assign MUX_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_stageReg_write_1__VAL_1 = @@ -6097,7 +9554,7 @@ module mkQP(CLK, 2'd2 : 2'd0 ; assign MUX_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_stageReg_write_1__VAL_2 = - (bits__h49179 == 2'd0) ? bits__h49179 : 2'd3 ; + (bits__h49117 == 2'd0) ? bits__h49117 : 2'd3 ; assign MUX_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_stageReg_write_1__VAL_3 = sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[0] ? 2'd2 : @@ -6156,7 +9613,7 @@ module mkQP(CLK, assign MUX_sq_respHandleSQ_incomingRespQ_enq_1__VAL_3 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1463, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1521, - enumBits__h93928, + enumBits__h93866, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1561, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562, @@ -6165,23 +9622,23 @@ module mkQP(CLK, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621, - value__h99740, + value__h99678, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1624, - value__h99767, + value__h99705, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1626, - value__h99797, + value__h99735, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629, - value__h99824, + value__h99762, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631, - value__h99854, + value__h99792, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1634, - value__h99881, + value__h99819, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636, - value__h99908, + value__h99846, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1474, - value__h99939, + value__h99877, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1492, - value__h99966, + value__h99904, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d1650, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1652, @@ -6217,7 +9674,7 @@ module mkQP(CLK, assign MUX_sq_respHandleSQ_incomingRespQ_enq_1__VAL_5 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1463, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1521, - enumBits__h93928, + enumBits__h93866, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1561, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562, @@ -6226,23 +9683,23 @@ module mkQP(CLK, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621, - value__h99740, + value__h99678, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1624, - value__h99767, + value__h99705, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1626, - value__h99797, + value__h99735, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629, - value__h99824, + value__h99762, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631, - value__h99854, + value__h99792, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1634, - value__h99881, + value__h99819, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636, - value__h99908, + value__h99846, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1474, - value__h99939, + value__h99877, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1492, - value__h99966, + value__h99904, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d1650, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1652, @@ -6266,19 +9723,19 @@ module mkQP(CLK, sq_retryHandler_timeOutCntReg[20:0] == 21'd0 ; assign MUX_sq_retryHandler_retryCntReg_write_1__VAL_1 = sq_retryHandler_updateRetryCntQ_D_OUT[3] ? - x__h35617 : + x__h35555 : cntrl_maxRetryCntReg ; assign MUX_sq_retryHandler_retryHandleStateReg_write_1__VAL_3 = (sq_retryHandler_retryReasonReg == 3'd1) ? 3'd2 : 3'd4 ; assign MUX_sq_retryHandler_rnrCntReg_write_1__VAL_1 = sq_retryHandler_updateRetryCntQ_D_OUT[3] ? - x__h35647 : + x__h35585 : cntrl_maxRnrCntReg ; assign MUX_sq_retryHandler_rnrWaitCntReg_write_1__VAL_1 = sq_retryHandler_rnrWaitCntReg - 27'd1 ; - always@(rnrTimer__h36783) + always@(rnrTimer__h36721) begin - case (rnrTimer__h36783) + case (rnrTimer__h36721) 5'd0: MUX_sq_retryHandler_rnrWaitCntReg_write_1__VAL_2 = 27'd109226667; 5'd1: MUX_sq_retryHandler_rnrWaitCntReg_write_1__VAL_2 = 27'd1667; 5'd2: MUX_sq_retryHandler_rnrWaitCntReg_write_1__VAL_2 = 27'd3334; @@ -6318,8 +9775,8 @@ module mkQP(CLK, sq_retryHandler_retryCntrlStateReg != 2'd0 || sq_retryHandler_isTimeOutCntHighPartZeroReg && sq_retryHandler_isTimeOutCntLowPartZeroReg) ? - x__h32835 : - x__h33715 ; + x__h32773 : + x__h33653 ; assign MUX_sq_workCompGenSQ_workCompOutQ4SQ_enq_1__VAL_2 = { sq_workCompGenSQ_genWorkCompQ_D_OUT[223:152], 12'd5, @@ -6329,7 +9786,7 @@ module mkQP(CLK, assign payloadGenerator4SQ_payloadBufQ_wDataIn_wget = { dmaReadCntrl4SQ_respQ_D_OUT[291:36], dmaReadCntrl4SQ_respQ_D_OUT[0] ? - y_avValue_byteEn__h17055 : + y_avValue_byteEn__h16993 : dmaReadCntrl4SQ_respQ_D_OUT[35:4], dmaReadCntrl4SQ_respQ_D_OUT[3:2] } ; assign payloadGenerator4SQ_payloadBufQ_wDataIn_whas = @@ -7638,7 +11095,7 @@ module mkQP(CLK, sq_retryHandler_retryRespQ_EMPTY_N) && sq_respHandleSQ_pendingPermCheckQ_FULL_N && sq_respHandleSQ_pendingRetryCheckQ_EMPTY_N && - IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5037 ; + IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5043 ; assign _read_RL_sq_respHandleSQ_checkRetryErr_EN_cntrl_stateReg_whas = CAN_FIRE_RL_sq_respHandleSQ_checkRetryErr ; assign _first_RL_sq_respHandleSQ_checkRetryErr_EN_sq_retryHandler_retryRespQ_wget = @@ -7680,7 +11137,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd10 || sq_retryHandler_retryRespQ_EMPTY_N) && sq_respHandleSQ_pendingRetryCheckQ_EMPTY_N && - IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5037 ; + IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5043 ; assign _i_notFull_RL_sq_respHandleSQ_checkRetryErr_EN_sq_respHandleSQ_pendingPermCheckQ_whas = CAN_FIRE_RL_sq_respHandleSQ_checkRetryErr ; assign _read_RL_sq_respHandleSQ_checkPerm4NormalReadAtomicResp_EN_cntrl_stateReg_wget = @@ -8178,38 +11635,38 @@ module mkQP(CLK, sq_respHandleSQ_retryFlushReg && !sq_respHandleSQ_recvErrRespReg ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_cntrl_stateReg_whas = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_pendingWorkReqBuf_emptyReg_wget = 1'b1 ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_pendingWorkReqBuf_emptyReg_whas = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_retryHandler_retryHandleStateReg_wget = 1'b1 ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_retryHandler_retryHandleStateReg_whas = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_recvErrRespReg_wget = cntrl_stateReg == 4'd3 && sq_respHandleSQ_retryFlushReg && !sq_respHandleSQ_errOccurredReg ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_recvErrRespReg_whas = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign _write_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_recvRetryRespReg_wget = sq_retryHandler_retryHandleStateReg == 3'd7 ; assign _write_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_recvRetryRespReg_whas = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_errOccurredReg_wget = cntrl_stateReg == 4'd3 && sq_respHandleSQ_retryFlushReg && !sq_respHandleSQ_recvErrRespReg ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_errOccurredReg_whas = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_retryFlushReg_wget = cntrl_stateReg == 4'd3 && !sq_respHandleSQ_recvErrRespReg && !sq_respHandleSQ_errOccurredReg ; assign _read_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_retryFlushReg_whas = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign _write_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_retryFlushReg_wget = sq_retryHandler_retryHandleStateReg == 3'd7 ; assign _write_RL_sq_respHandleSQ_retryFlushDone_EN_sq_respHandleSQ_retryFlushReg_whas = - cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 ; + cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 ; assign _read_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload_EN_cntrl_stateReg_wget = !sq_respHandleSQ_errOccurredReg && !sq_respHandleSQ_recvErrRespReg && @@ -8277,14 +11734,14 @@ module mkQP(CLK, assign _read_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ_EN_cntrl_preStateReg_wget = cntrl_stateReg == 4'd3 && sq_workCompGenSQ_workCompGenStateReg == 2'd1 && - IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__69_ETC___d5707 && + IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__70_ETC___d5713 && cntrl_stateReg != 4'd6 && sq_workCompGenSQ_workCompGenStateReg != 2'd2 ; assign _read_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ_EN_cntrl_preStateReg_whas = CAN_FIRE_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ ; assign _read_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ_EN_cntrl_stateReg_wget = cntrl_preStateReg == 4'd3 && - IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__69_ETC___d5707 && + IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__70_ETC___d5713 && sq_workCompGenSQ_workCompGenStateReg == 2'd1 ; assign _read_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ_EN_cntrl_stateReg_whas = CAN_FIRE_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ ; @@ -8348,7 +11805,7 @@ module mkQP(CLK, CAN_FIRE_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ ; assign _read_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ_EN_sq_workCompGenSQ_workCompGenStateReg_wget = cntrl_stateReg == 4'd3 && - IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__69_ETC___d5707 && + IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__70_ETC___d5713 && cntrl_preStateReg == 4'd3 ; assign _read_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ_EN_sq_workCompGenSQ_workCompGenStateReg_whas = CAN_FIRE_RL_sq_workCompGenSQ_recvWorkCompGenReqSQ ; @@ -8547,14 +12004,14 @@ module mkQP(CLK, cntrl_stateReg == 4'd3 && sq_workCompGenSQ_workCompGenStateReg == 2'd1 && sq_workCompGenSQ_genWorkCompQ_EMPTY_N && - IF_sq_workCompGenSQ_genWorkCompQ_first__802_BI_ETC___d5808 ; + IF_sq_workCompGenSQ_genWorkCompQ_first__808_BI_ETC___d5814 ; assign _read_RL_sq_workCompGenSQ_genWorkCompSQ_EN_cntrl_preStateReg_whas = CAN_FIRE_RL_sq_workCompGenSQ_genWorkCompSQ ; assign _read_RL_sq_workCompGenSQ_genWorkCompSQ_EN_cntrl_stateReg_wget = cntrl_preStateReg == 4'd3 && sq_workCompGenSQ_workCompGenStateReg == 2'd1 && sq_workCompGenSQ_genWorkCompQ_EMPTY_N && - IF_sq_workCompGenSQ_genWorkCompQ_first__802_BI_ETC___d5808 ; + IF_sq_workCompGenSQ_genWorkCompQ_first__808_BI_ETC___d5814 ; assign _read_RL_sq_workCompGenSQ_genWorkCompSQ_EN_cntrl_stateReg_whas = CAN_FIRE_RL_sq_workCompGenSQ_genWorkCompSQ ; assign _enq_RL_sq_workCompGenSQ_genWorkCompSQ_EN_sq_workCompGenSQ_workCompOutQ4SQ_wget = @@ -8579,14 +12036,14 @@ module mkQP(CLK, CAN_FIRE_RL_sq_workCompGenSQ_genWorkCompSQ ; assign _i_notEmpty_RL_sq_workCompGenSQ_genWorkCompSQ_EN_sq_workCompGenSQ_genWorkCompQ_wget = cntrl_stateReg == 4'd3 && cntrl_preStateReg == 4'd3 && - IF_sq_workCompGenSQ_genWorkCompQ_first__802_BI_ETC___d5808 && + IF_sq_workCompGenSQ_genWorkCompQ_first__808_BI_ETC___d5814 && sq_workCompGenSQ_workCompGenStateReg == 2'd1 ; assign _i_notEmpty_RL_sq_workCompGenSQ_genWorkCompSQ_EN_sq_workCompGenSQ_genWorkCompQ_whas = CAN_FIRE_RL_sq_workCompGenSQ_genWorkCompSQ ; assign _read_RL_sq_workCompGenSQ_genWorkCompSQ_EN_sq_workCompGenSQ_workCompGenStateReg_wget = cntrl_stateReg == 4'd3 && cntrl_preStateReg == 4'd3 && sq_workCompGenSQ_genWorkCompQ_EMPTY_N && - IF_sq_workCompGenSQ_genWorkCompQ_first__802_BI_ETC___d5808 ; + IF_sq_workCompGenSQ_genWorkCompQ_first__808_BI_ETC___d5814 ; assign _read_RL_sq_workCompGenSQ_genWorkCompSQ_EN_sq_workCompGenSQ_workCompGenStateReg_whas = CAN_FIRE_RL_sq_workCompGenSQ_genWorkCompSQ ; assign _write_RL_sq_workCompGenSQ_genWorkCompSQ_EN_sq_workCompGenSQ_workCompGenStateReg_wget = @@ -9306,7 +12763,7 @@ module mkQP(CLK, assign cntrl_npsnReg_D_IN = MUX_cntrl_npsnReg_write_1__SEL_1 ? cntrl_reqQ_D_OUT[149:126] : - nextPktSeqNum__h56056 ; + nextPktSeqNum__h55994 ; assign cntrl_npsnReg_EN = WILL_FIRE_RL_cntrl_onRTR && cntrl_reqQ_D_OUT[300:299] == 2'd2 || WILL_FIRE_RL_sq_reqGenSQ_calcPktSeqNum4NewWorkReq && @@ -9445,13 +12902,13 @@ module mkQP(CLK, // register dmaReadCntrl4SQ_addrChunkSrv_isZeroResidueReg assign dmaReadCntrl4SQ_addrChunkSrv_isZeroResidueReg_D_IN = - !pmtuResidue__h9230[11] && pmtuResidue__h9230[10:9] == 2'd0 && - !pmtuResidue__h9230[8] && - pmtuResidue__h9230[7:6] == 2'd0 && - !pmtuResidue__h9230[5] && - pmtuResidue__h9230[4:3] == 2'd0 && - !pmtuResidue__h9230[2] && - pmtuResidue__h9230[1:0] == 2'd0 ; + !pmtuResidue__h9168[11] && pmtuResidue__h9168[10:9] == 2'd0 && + !pmtuResidue__h9168[8] && + pmtuResidue__h9168[7:6] == 2'd0 && + !pmtuResidue__h9168[5] && + pmtuResidue__h9168[4:3] == 2'd0 && + !pmtuResidue__h9168[2] && + pmtuResidue__h9168[1:0] == 2'd0 ; assign dmaReadCntrl4SQ_addrChunkSrv_isZeroResidueReg_EN = CAN_FIRE_RL_dmaReadCntrl4SQ_addrChunkSrv_recvReq ; @@ -9471,7 +12928,7 @@ module mkQP(CLK, CAN_FIRE_RL_dmaReadCntrl4SQ_addrChunkSrv_recvReq ; // register dmaReadCntrl4SQ_addrChunkSrv_residueReg - assign dmaReadCntrl4SQ_addrChunkSrv_residueReg_D_IN = pmtuResidue__h9230 ; + assign dmaReadCntrl4SQ_addrChunkSrv_residueReg_D_IN = pmtuResidue__h9168 ; assign dmaReadCntrl4SQ_addrChunkSrv_residueReg_EN = CAN_FIRE_RL_dmaReadCntrl4SQ_addrChunkSrv_recvReq ; @@ -9497,8 +12954,8 @@ module mkQP(CLK, assign payloadGenerator4SQ_payloadBufQ_rCache_D_IN = { 1'd1, payloadGenerator4SQ_payloadBufQ_rWrPtr, - x__read_data__h12578, - x__read_byteEn__h12579, + x__read_data__h12516, + x__read_byteEn__h12517, CAN_FIRE_RL_payloadGenerator4SQ_lastFragAddPadding && payloadGenerator4SQ_payloadBufQ_wDataIn_wget[1], CAN_FIRE_RL_payloadGenerator4SQ_lastFragAddPadding && @@ -9509,26 +12966,18 @@ module mkQP(CLK, // register payloadGenerator4SQ_payloadBufQ_rRdPtr assign payloadGenerator4SQ_payloadBufQ_rRdPtr_D_IN = - (cntrl_stateReg == 4'd0) ? 10'd0 : x__h12913 ; + (cntrl_stateReg == 4'd0) ? 10'd0 : x__h12851 ; assign payloadGenerator4SQ_payloadBufQ_rRdPtr_EN = cntrl_stateReg == 4'd0 || CAN_FIRE_RL_payloadGenerator4SQ_bramQ2PipeOut_mkConnectionGetPut ; // register payloadGenerator4SQ_payloadBufQ_rWrPtr assign payloadGenerator4SQ_payloadBufQ_rWrPtr_D_IN = - (cntrl_stateReg == 4'd0) ? 10'd0 : x__h12662 ; + (cntrl_stateReg == 4'd0) ? 10'd0 : x__h12600 ; assign payloadGenerator4SQ_payloadBufQ_rWrPtr_EN = cntrl_stateReg == 4'd0 || CAN_FIRE_RL_payloadGenerator4SQ_lastFragAddPadding ; - // register rqDmaReadCancelReg - assign rqDmaReadCancelReg_D_IN = 1'd0 ; - assign rqDmaReadCancelReg_EN = cntrl_stateReg == 4'd0 ; - - // register rqDmaWriteCancelReg - assign rqDmaWriteCancelReg_D_IN = 1'd0 ; - assign rqDmaWriteCancelReg_EN = cntrl_stateReg == 4'd0 ; - // register sqDmaReadCancelReg assign sqDmaReadCancelReg_D_IN = !WILL_FIRE_RL_resetAndClear ; assign sqDmaReadCancelReg_EN = @@ -9729,7 +13178,7 @@ module mkQP(CLK, assign sq_pendingWorkReqBuf_scanStopReg_EN = 1'b1 ; // register sq_reqGenSQ_curPsnReg - assign sq_reqGenSQ_curPsnReg_D_IN = curPSN__h61636 + 24'd1 ; + assign sq_reqGenSQ_curPsnReg_D_IN = curPSN__h61574 + 24'd1 ; assign sq_reqGenSQ_curPsnReg_EN = CAN_FIRE_RL_sq_reqGenSQ_countReqPkt ; // register sq_reqGenSQ_isFirstOrOnlyReqPktReg @@ -9760,8 +13209,8 @@ module mkQP(CLK, // register sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_rdmaHeaderReg assign sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_rdmaHeaderReg_D_IN = - { leftShiftHeaderData__h47318, - leftShiftHeaderByteEn__h47319, + { leftShiftHeaderData__h47256, + leftShiftHeaderByteEn__h47257, IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1770 } ; assign sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_rdmaHeaderReg_EN = WILL_FIRE_RL_sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_outputHeader && @@ -9787,19 +13236,19 @@ module mkQP(CLK, // register sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidBitNumReg assign sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidBitNumReg_D_IN = - { headerLastFragInvalidByteNum__h47982, 3'd0 } ; + { headerLastFragInvalidByteNum__h47920, 3'd0 } ; assign sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidBitNumReg_EN = CAN_FIRE_RL_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_popHeaderMetaData ; // register sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidByteNumReg assign sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidByteNumReg_D_IN = - headerLastFragInvalidByteNum__h47982 ; + headerLastFragInvalidByteNum__h47920 ; assign sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidByteNumReg_EN = CAN_FIRE_RL_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_popHeaderMetaData ; // register sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragValidBitNumReg assign sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragValidBitNumReg_D_IN = - headerLastFragValidBitNum__h47980 ; + headerLastFragValidBitNum__h47918 ; assign sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragValidBitNumReg_EN = CAN_FIRE_RL_sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_popHeaderMetaData ; @@ -9867,10 +13316,10 @@ module mkQP(CLK, // register sq_reqGenSQ_remainingPktNumReg assign sq_reqGenSQ_remainingPktNumReg_D_IN = sq_reqGenSQ_isFirstOrOnlyReqPktReg ? - _theResult___snd__h61670 : + _theResult___snd__h61608 : ((!sq_reqGenSQ_reqCountQ_D_OUT[5] && sq_reqGenSQ_remainingPktNumReg != 25'd0) ? - remainingPktNum___1__h61739 : + remainingPktNum___1__h61677 : sq_reqGenSQ_remainingPktNumReg) ; assign sq_reqGenSQ_remainingPktNumReg_EN = CAN_FIRE_RL_sq_reqGenSQ_countReqPkt ; @@ -9990,9 +13439,9 @@ module mkQP(CLK, 4'd5 || SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1521 == 4'd6, - respPktPipe_metaDataQ_D_OUT[554:531] == value__h99966, + respPktPipe_metaDataQ_D_OUT[554:531] == value__h99904, IF_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_ETC___d4106, - respPktPipe_metaDataQ_D_OUT[554:531] == value__h99939, + respPktPipe_metaDataQ_D_OUT[554:531] == value__h99877, IF_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_ETC___d4116 } ; assign sq_respHandleSQ_preStageRespAndWorkReqRelationReg_EN = CAN_FIRE_RL_sq_respHandleSQ_preBuildRespInfo ; @@ -10039,7 +13488,7 @@ module mkQP(CLK, // register sq_respHandleSQ_preStageWorkCompReqTypeReg assign sq_respHandleSQ_preStageWorkCompReqTypeReg_D_IN = sq_respHandleSQ_preStagePktMetaDataReg[1] ? - CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31 : + CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32 : 2'd0 ; assign sq_respHandleSQ_preStageWorkCompReqTypeReg_EN = CAN_FIRE_RL_sq_respHandleSQ_preProcRespInfo ; @@ -10047,7 +13496,7 @@ module mkQP(CLK, // register sq_respHandleSQ_preStageWorkReqAckTypeReg assign sq_respHandleSQ_preStageWorkReqAckTypeReg_D_IN = sq_respHandleSQ_preStagePktMetaDataReg[1] ? - CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32 : + CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31 : 4'd10 ; assign sq_respHandleSQ_preStageWorkReqAckTypeReg_EN = CAN_FIRE_RL_sq_respHandleSQ_preProcRespInfo ; @@ -10157,7 +13606,7 @@ module mkQP(CLK, WILL_FIRE_RL_sq_retryHandler_resetAndClear ; // register sq_retryHandler_psnDiffReg - assign sq_retryHandler_psnDiffReg_D_IN = x__h37628[23:0] ; + assign sq_retryHandler_psnDiffReg_D_IN = x__h37566[23:0] ; assign sq_retryHandler_psnDiffReg_EN = CAN_FIRE_RL_sq_retryHandler_checkPartialRetry ; @@ -10278,7 +13727,7 @@ module mkQP(CLK, assign sq_retryHandler_timeOutCntReg_D_IN = MUX_sq_retryHandler_isTimeOutCntHighPartZeroReg_write_1__SEL_1 ? MUX_sq_retryHandler_timeOutCntReg_write_1__VAL_1 : - x__h32835 ; + x__h32773 ; assign sq_retryHandler_timeOutCntReg_EN = MUX_sq_retryHandler_isTimeOutCntHighPartZeroReg_write_1__SEL_1 || WILL_FIRE_RL_sq_retryHandler_initRetryCntAndTimeOutTimer ; @@ -10396,7 +13845,7 @@ module mkQP(CLK, // submodule dmaReadCntrl4SQ_addrChunkSrv_respQ assign dmaReadCntrl4SQ_addrChunkSrv_respQ_D_IN = { dmaReadCntrl4SQ_addrChunkSrv_chunkAddrReg, - addrChunkResp_chunkLen__h10586, + addrChunkResp_chunkLen__h10524, dmaReadCntrl4SQ_addrChunkSrv_isFirstReg, dmaReadCntrl4SQ_addrChunkSrv_pktNumReg_77_BITS_ETC___d366 && NOT_dmaReadCntrl4SQ_addrChunkSrv_pktNumReg_77__ETC___d376 } ; @@ -10480,11 +13929,11 @@ module mkQP(CLK, payloadGenerator4SQ_payloadBufQ_rWrPtr[8:0] ; assign payloadGenerator4SQ_payloadBufQ_memory_ADDRB = CAN_FIRE_RL_payloadGenerator4SQ_bramQ2PipeOut_mkConnectionGetPut ? - x__h12913[8:0] : + x__h12851[8:0] : payloadGenerator4SQ_payloadBufQ_rRdPtr[8:0] ; assign payloadGenerator4SQ_payloadBufQ_memory_DIA = - { x__read_data__h12578, - x__read_byteEn__h12579, + { x__read_data__h12516, + x__read_byteEn__h12517, CAN_FIRE_RL_payloadGenerator4SQ_lastFragAddPadding && payloadGenerator4SQ_payloadBufQ_wDataIn_wget[1], CAN_FIRE_RL_payloadGenerator4SQ_lastFragAddPadding && @@ -10531,8 +13980,8 @@ module mkQP(CLK, // submodule payloadGenerator4SQ_pendingGenReqQ assign payloadGenerator4SQ_pendingGenReqQ_D_IN = { payloadGenerator4SQ_payloadGenReqQ_D_OUT, - x__h14424, - x__h16825 } ; + x__h14362, + x__h16763 } ; assign payloadGenerator4SQ_pendingGenReqQ_ENQ = CAN_FIRE_RL_payloadGenerator4SQ_recvPayloadGenReq ; assign payloadGenerator4SQ_pendingGenReqQ_DEQ = @@ -10719,8 +14168,8 @@ module mkQP(CLK, // submodule sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerDataStreamOutQ assign sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerDataStreamOutQ_D_IN = - { x__h47525[511:256], - x__h47528[63:32], + { x__h47463[511:256], + x__h47466[63:32], !sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerValidReg, IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1742 || IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1737 == @@ -10894,7 +14343,7 @@ module mkQP(CLK, // submodule sq_reqGenSQ_reqHeaderPrepareQ assign sq_reqGenSQ_reqHeaderPrepareQ_D_IN = - { curPSN__h61636, + { curPSN__h61574, sq_reqGenSQ_reqCountQ_D_OUT[683:5], sq_reqGenSQ_isFirstOrOnlyReqPktReg, sq_reqGenSQ_reqCountQ_D_OUT[5] || @@ -10942,8 +14391,8 @@ module mkQP(CLK, // submodule sq_reqGenSQ_workReqPayloadGenQ assign sq_reqGenSQ_workReqPayloadGenQ_D_IN = { sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT, - x__h52242, - x__h52371, + x__h52180, + x__h52309, (sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[614:611] == 4'd0 || sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[614:611] == 4'd1 || sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[614:611] == 4'd2 || @@ -10996,26 +14445,26 @@ module mkQP(CLK, sq_reqGenSQ_workReqPktNumQ_D_OUT[4] || sq_reqGenSQ_workReqPktNumQ_D_OUT[57], sq_reqGenSQ_workReqPktNumQ_D_OUT[4] ? - totalPktNum__h55209 : + totalPktNum__h55147 : sq_reqGenSQ_workReqPktNumQ_D_OUT[56:32], sq_reqGenSQ_workReqPktNumQ_D_OUT[4] || sq_reqGenSQ_workReqPktNumQ_D_OUT[31], sq_reqGenSQ_workReqPktNumQ_D_OUT[4] ? - totalPktNum__h55209[24:23] == 2'd0 && - !totalPktNum__h55209[22] && - totalPktNum__h55209[21:20] == 2'd0 && - !totalPktNum__h55209[19] && - totalPktNum__h55209[18:17] == 2'd0 && - !totalPktNum__h55209[16] && - totalPktNum__h55209[15:14] == 2'd0 && - !totalPktNum__h55209[13] && - totalPktNum__h55209[12:11] == 2'd0 && - !totalPktNum__h55209[10] && - totalPktNum__h55209[9:8] == 2'd0 && - !totalPktNum__h55209[7] && - totalPktNum__h55209[6:5] == 2'd0 && - totalPktNum__h55209[4:3] == 2'd0 && - totalPktNum__h55209[2:1] == 2'd0 : + totalPktNum__h55147[24:23] == 2'd0 && + !totalPktNum__h55147[22] && + totalPktNum__h55147[21:20] == 2'd0 && + !totalPktNum__h55147[19] && + totalPktNum__h55147[18:17] == 2'd0 && + !totalPktNum__h55147[16] && + totalPktNum__h55147[15:14] == 2'd0 && + !totalPktNum__h55147[13] && + totalPktNum__h55147[12:11] == 2'd0 && + !totalPktNum__h55147[10] && + totalPktNum__h55147[9:8] == 2'd0 && + !totalPktNum__h55147[7] && + totalPktNum__h55147[6:5] == 2'd0 && + totalPktNum__h55147[4:3] == 2'd0 && + totalPktNum__h55147[2:1] == 2'd0 : sq_reqGenSQ_workReqPktNumQ_D_OUT[30], sq_reqGenSQ_workReqPktNumQ_D_OUT[4:0] } ; assign sq_reqGenSQ_workReqPsnQ_ENQ = @@ -11164,7 +14613,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] == 4'd0 || sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] == 4'd2 || CASE_sq_respHandleSQ_pendingRetryCheckQD_OUT__ETC__q27, - sq_respHandleSQ_pendingRetryCheckQ_first__949__ETC___d5187 } ; + sq_respHandleSQ_pendingRetryCheckQ_first__955__ETC___d5193 } ; assign sq_respHandleSQ_pendingPermCheckQ_ENQ = CAN_FIRE_RL_sq_respHandleSQ_checkRetryErr ; assign sq_respHandleSQ_pendingPermCheckQ_DEQ = @@ -11381,7 +14830,7 @@ module mkQP(CLK, // submodule sq_retryHandler_retryReqQ assign sq_retryHandler_retryReqQ_D_IN = { sq_respHandleSQ_pendingRespQ_D_OUT[1472:1409], - sq_respHandleSQ_pendingRespQ_D_OUT[72:49], + retryStartPSN__h103743, (sq_respHandleSQ_pendingRespQ_D_OUT[9:6] == 4'd10) ? 3'd3 : CASE_sq_respHandleSQ_pendingRespQD_OUT_BITS_4_ETC__q33, @@ -11519,7 +14968,7 @@ module mkQP(CLK, NOT_IF_sq_retryHandler_retryReasonReg_431_EQ_4_ETC___d1505 : NOT_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVe_ETC___d1514 ; assign IF_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_ETC___d4106 = - (value__h99966[23] == cntrl_npsnReg[23]) ? + (value__h99904[23] == cntrl_npsnReg[23]) ? IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d4097 && respPktPipe_metaDataQ_first__626_BITS_554_TO_5_ETC___d4098 : IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d4105 ; @@ -11536,34 +14985,34 @@ module mkQP(CLK, sq_retryHandler_updateRetryCntQ_D_OUT[2:0] == 3'd4) && sq_retryHandler_retryCntReg == 3'd0 ; assign IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d1501 = - value__h99939[23] == value__h99966[23] ; + value__h99877[23] == value__h99904[23] ; assign IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d4097 = - value__h99966 < respPktPipe_metaDataQ_D_OUT[554:531] ; + value__h99904 < respPktPipe_metaDataQ_D_OUT[554:531] ; assign IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d4105 = IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d4097 && - value__h99966[23] == respPktPipe_metaDataQ_D_OUT[554] || + value__h99904[23] == respPktPipe_metaDataQ_D_OUT[554] || respPktPipe_metaDataQ_first__626_BITS_554_TO_5_ETC___d4098 && respPktPipe_metaDataQ_D_OUT[554] == cntrl_npsnReg[23] ; assign IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d4108 = - value__h99939 < respPktPipe_metaDataQ_D_OUT[554:531] ; + value__h99877 < respPktPipe_metaDataQ_D_OUT[554:531] ; assign IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d4115 = IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0__ETC___d4108 && - value__h99939[23] == respPktPipe_metaDataQ_D_OUT[554] || + value__h99877[23] == respPktPipe_metaDataQ_D_OUT[554] || respPktPipe_metaDataQ_first__626_BITS_554_TO_5_ETC___d4109 && - respPktPipe_metaDataQ_D_OUT[554] == value__h99966[23] ; + respPktPipe_metaDataQ_D_OUT[554] == value__h99904[23] ; assign IF_cntrl_npsnReg_41_BIT_23_518_EQ_IF_IF_sq_req_ETC___d2534 = - (cntrl_npsnReg[23] == nextPktSeqNum__h56056[23]) ? + (cntrl_npsnReg[23] == nextPktSeqNum__h55994[23]) ? NOT_cntrl_npsnReg_41_ULT_IF_IF_sq_reqGenSQ_wor_ETC___d2522 || NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2524 : NOT_cntrl_npsnReg_41_ULT_IF_IF_sq_reqGenSQ_wor_ETC___d2533 ; assign IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_12_ELSE_16___d3346 = (cntrl_sqTypeReg == 4'd2) ? 7'd12 : 7'd16 ; assign IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_cntrl__ETC___d3311 = - (cntrl_sqTypeReg == 4'd2) ? a__h69887 : a__h69889 ; + (cntrl_sqTypeReg == 4'd2) ? a__h69825 : a__h69827 ; assign IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_sq_req_ETC___d3316 = - (cntrl_sqTypeReg == 4'd2) ? a__h69891 : a__h69893 ; + (cntrl_sqTypeReg == 4'd2) ? a__h69829 : a__h69831 ; assign IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_sq_req_ETC___d3349 = - (cntrl_sqTypeReg == 4'd2) ? b__h69892 : b__h69894 ; + (cntrl_sqTypeReg == 4'd2) ? b__h69830 : b__h69832 ; assign IF_cntrl_stateReg_EQ_3_AND_sq_pendingWorkReqPi_ETC___d1880 = (cntrl_stateReg == 4'd3 && sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[606]) ? @@ -11599,8 +15048,8 @@ module mkQP(CLK, (IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1742 || sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerDataStreamOutQ_FULL_N) ; assign IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1770 = - { remainingHeaderLen__h47316, - remainingHeaderFragNum__h47317, + { remainingHeaderLen__h47254, + remainingHeaderFragNum__h47255, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerValidReg ? sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_rdmaHeaderReg[7:0] : sq_reqGenSQ_reqHeaderOutQ_D_OUT[7:0] } ; @@ -11643,8 +15092,8 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[142]) && CASE_sq_reqGenSQ_reqHeaderPrepareQD_OUT_BITS__ETC__q18 : CASE_sq_reqGenSQ_reqHeaderPrepareQD_OUT_BITS__ETC__q19, - x__h74169, - x__h81436, + x__h74107, + x__h81374, !sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[6] || (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] == 4'd0 || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] == 4'd1 || @@ -11670,7 +15119,7 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] != 4'd4 && sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] != 4'd5 && sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] != 4'd6 } ; - assign IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__69_ETC___d5707 = + assign IF_sq_reqGenSQ_workCompGenReqOutQ_notEmpty__70_ETC___d5713 = sq_reqGenSQ_workCompGenReqOutQ_EMPTY_N ? sq_reqGenSQ_workCompGenReqOutQ_EMPTY_N && sq_workCompGenSQ_pendingWorkCompQ4SQ_FULL_N : @@ -11679,8 +15128,8 @@ module mkQP(CLK, assign IF_sq_respHandleSQ_pendingRespQ_first__787_BIT_ETC___d4844 = IF_sq_respHandleSQ_pendingRespQ_first__787_BIT_ETC___d4824 || CASE_sq_respHandleSQ_preRdmaOpCodeReg_13_NOT_s_ETC__q14 ; - assign IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5037 = - IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d4989 && + assign IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5043 = + IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d4995 && CASE_sq_respHandleSQ_pendingRetryCheckQD_OUT__ETC__q17 || sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd9 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd10 || @@ -11695,7 +15144,7 @@ module mkQP(CLK, !sq_retryHandler_isTimeOutCntLowPartZeroReg || cntrl_stateReg != 4'd0 && cntrl_stateReg != 4'd7 && sq_retryHandler_timeOutTriggerQ_FULL_N ; - assign IF_sq_retryHandler_retryRespQ_first__023_THEN__ETC___d5182 = + assign IF_sq_retryHandler_retryRespQ_first__029_THEN__ETC___d5188 = sq_retryHandler_retryRespQ_D_OUT ? 2'd1 : sq_respHandleSQ_pendingRetryCheckQ_D_OUT[2:1] ; @@ -11706,28 +15155,28 @@ module mkQP(CLK, !sq_retryHandler_disableRetryCntReg && sq_retryHandler_retryCntReg != 3'd0 || !sq_retryHandler_updateRetryCntQ_D_OUT[3] ; - assign IF_sq_workCompGenSQ_genWorkCompQ_first__802_BI_ETC___d5808 = + assign IF_sq_workCompGenSQ_genWorkCompQ_first__808_BI_ETC___d5814 = sq_workCompGenSQ_genWorkCompQ_D_OUT[1] ? !sq_workCompGenSQ_genWorkCompQ_D_OUT[0] || sq_workCompGenSQ_workCompOutQ4SQ_FULL_N : sq_workCompGenSQ_workCompOutQ4SQ_FULL_N ; assign NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2524 = - endPktSeqNum__h56057 >= nextPktSeqNum__h56056 ; + endPktSeqNum__h55995 >= nextPktSeqNum__h55994 ; assign NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2536 = - x__h56104 != nextPktSeqNum__h56056 || - endPktSeqNum__h56057 != cntrl_npsnReg && + x__h56042 != nextPktSeqNum__h55994 || + endPktSeqNum__h55995 != cntrl_npsnReg && IF_cntrl_npsnReg_41_BIT_23_518_EQ_IF_IF_sq_req_ETC___d2534 ; assign NOT_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVe_ETC___d1503 = - value__h99939 >= v__h37423 ; + value__h99877 >= v__h37361 ; assign NOT_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVe_ETC___d1514 = (NOT_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVe_ETC___d1503 || - value__h99939[23] != v__h37423[23]) && + value__h99877[23] != v__h37361[23]) && (NOT_IF_sq_retryHandler_retryReasonReg_431_EQ_4_ETC___d1505 || - v__h37423[23] != value__h99966[23]) ; + v__h37361[23] != value__h99904[23]) ; assign NOT_IF_sq_retryHandler_retryReasonReg_431_EQ_4_ETC___d1505 = - v__h37423 >= value__h99966 ; + v__h37361 >= value__h99904 ; assign NOT_IF_sq_retryHandler_retryReasonReg_431_EQ_4_ETC___d1516 = - v__h37423 != value__h99939 && v__h37423 != value__h99966 && + v__h37361 != value__h99877 && v__h37361 != value__h99904 && IF_IF_SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_ETC___d1515 ; assign NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 = !SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1474 || @@ -11861,12 +15310,12 @@ module mkQP(CLK, !SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3816 && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3956 ; assign NOT_cntrl_npsnReg_41_ULT_IF_IF_sq_reqGenSQ_wor_ETC___d2522 = - cntrl_npsnReg >= endPktSeqNum__h56057 ; + cntrl_npsnReg >= endPktSeqNum__h55995 ; assign NOT_cntrl_npsnReg_41_ULT_IF_IF_sq_reqGenSQ_wor_ETC___d2533 = (NOT_cntrl_npsnReg_41_ULT_IF_IF_sq_reqGenSQ_wor_ETC___d2522 || - cntrl_npsnReg[23] != endPktSeqNum__h56057[23]) && + cntrl_npsnReg[23] != endPktSeqNum__h55995[23]) && (NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2524 || - endPktSeqNum__h56057[23] != nextPktSeqNum__h56056[23]) ; + endPktSeqNum__h55995[23] != nextPktSeqNum__h55994[23]) ; assign NOT_cntrl_sqTypeReg_887_EQ_2_888_889_AND_NOT_c_ETC___d2712 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] != 4'd0 && sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] != 4'd1 && @@ -12026,16 +15475,16 @@ module mkQP(CLK, { sq_retryHandler_retryReasonReg != 3'd4 || SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1474, (sq_retryHandler_retryReasonReg == 3'd4) ? - value__h99939 : + value__h99877 : sq_retryHandler_retryStartPsnReg, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1492, - value__h99966, + value__h99904, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649, SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d1650, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1652, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1653 } ; assign _1_SL_IF_payloadGenerator4SQ_payloadGenReqQ_fir_ETC___d577 = - (32'd1 << lastFragValidByteNumWithPadding__h13828) - 32'd1 ; + (32'd1 << lastFragValidByteNumWithPadding__h13766) - 32'd1 ; assign _1_SL_sq_reqGenSQ_pendingReqHeaderQ_first__424__ETC___d3443 = (64'd1 << sq_reqGenSQ_pendingReqHeaderQ_D_OUT[31:25]) - 64'd1 ; assign __duses1049 = @@ -12268,13 +15717,13 @@ module mkQP(CLK, (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) && - !enumBits__h93928[0] || + !enumBits__h93866[0] || sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2 || __duses795 ; assign __duses810 = - enumBits__h93928[1] && + enumBits__h93866[1] && (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) || @@ -12283,10 +15732,10 @@ module mkQP(CLK, (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) && - !enumBits__h93928[1] || + !enumBits__h93866[1] || __duses810 ; assign __duses819 = - enumBits__h93928[2] && + enumBits__h93866[2] && (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) || @@ -12295,10 +15744,10 @@ module mkQP(CLK, (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) && - !enumBits__h93928[2] || + !enumBits__h93866[2] || __duses819 ; assign __duses828 = - enumBits__h93928[3] && + enumBits__h93866[3] && (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) || @@ -12307,10 +15756,10 @@ module mkQP(CLK, (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) && - !enumBits__h93928[3] || + !enumBits__h93866[3] || __duses828 ; assign __duses837 = - enumBits__h93928[4] && + enumBits__h93866[4] && (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) || @@ -12319,19 +15768,19 @@ module mkQP(CLK, (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) && - !enumBits__h93928[4] || + !enumBits__h93866[4] || __duses837 ; assign __duses847 = (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) && - enumBits__h93928 == 5'd0 || + enumBits__h93866 == 5'd0 || __duses842 ; assign __duses852 = (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && sq_respHandleSQ_preStageReqPktInfoReg[5] || sq_respHandleSQ_preStageRespTypeReg == 2'd2) && - enumBits__h93928 != 5'd0 || + enumBits__h93866 != 5'd0 || __duses847 ; assign __duses863 = (sq_respHandleSQ_preStageRespTypeReg == 2'd0 && @@ -12466,30 +15915,30 @@ module mkQP(CLK, __duses996 || __duses991 || __duses988 ; - assign _theResult___snd__h61670 = + assign _theResult___snd__h61608 = sq_reqGenSQ_reqCountQ_D_OUT[5] ? 25'd0 : - remainingPktNum___1__h61681 ; - assign a__h52253 = + remainingPktNum___1__h61619 ; + assign a__h52191 = { 1'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[509:486] } ; - assign a__h52263 = + assign a__h52201 = { 2'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[509:487] } ; - assign a__h52273 = + assign a__h52211 = { 3'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[509:488] } ; - assign a__h52283 = + assign a__h52221 = { 4'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[509:489] } ; - assign a__h52293 = + assign a__h52231 = { 5'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[509:490] } ; - assign a__h63239 = + assign a__h63177 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12500,16 +15949,16 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[709:686], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[612:485], 288'd0 } ; - assign a__h63241 = + assign a__h63179 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12522,17 +15971,17 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[166:143], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[612:485], 256'd0 } ; - assign a__h63243 = + assign a__h63181 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12544,18 +15993,18 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[612:485], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[232:201], 256'd0 } : - a__h63239 ; - assign a__h63245 = + a__h63177 ; + assign a__h63183 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12569,17 +16018,17 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[612:485], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[232:201], 224'd0 } : - a__h63241 ; - assign a__h63247 = + a__h63179 ; + assign a__h63185 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12589,16 +16038,16 @@ module mkQP(CLK, 7'd0, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[709:686], 416'd0 } ; - assign a__h63249 = + assign a__h63187 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12611,16 +16060,16 @@ module mkQP(CLK, 8'd0, cntrl_sqpnReg, 352'd0 } ; - assign a__h63251 = + assign a__h63189 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12632,17 +16081,17 @@ module mkQP(CLK, 8'd0, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[166:143], 384'd0 } ; - assign a__h63253 = + assign a__h63191 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12653,17 +16102,17 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[709:686], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[232:201], 384'd0 } : - a__h63247 ; - assign a__h63255 = + a__h63185 ; + assign a__h63193 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12677,17 +16126,17 @@ module mkQP(CLK, cntrl_sqpnReg, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[232:201], 320'd0 } ; - assign a__h63257 = + assign a__h63195 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12700,18 +16149,18 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[166:143], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[232:201], 352'd0 } : - a__h63251 ; - assign a__h63259 = + a__h63189 ; + assign a__h63197 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12722,18 +16171,18 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[709:686], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[199:168], 384'd0 } : - a__h63247 ; - assign a__h63261 = + a__h63185 ; + assign a__h63199 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12746,17 +16195,17 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[166:143], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[199:168], 352'd0 } : - a__h63251 ; - assign a__h63269 = + a__h63189 ; + assign a__h63207 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12769,16 +16218,16 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[297:234], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[362:299], 192'd0 } ; - assign a__h63272 = + assign a__h63210 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3222, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h63283, + bth_padCnt__h63221, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12793,16 +16242,16 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[297:234], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[362:299], 160'd0 } ; - assign a__h69887 = + assign a__h69825 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h69915, + bth_padCnt__h69853, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12812,16 +16261,16 @@ module mkQP(CLK, 7'd0, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[709:686], 416'd0 } ; - assign a__h69889 = + assign a__h69827 = { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h69915, + bth_padCnt__h69853, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12833,17 +16282,17 @@ module mkQP(CLK, 8'd0, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[166:143], 384'd0 } ; - assign a__h69891 = + assign a__h69829 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h69915, + bth_padCnt__h69853, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12854,18 +16303,18 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[709:686], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[232:201], 384'd0 } : - a__h69887 ; - assign a__h69893 = + a__h69825 ; + assign a__h69831 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h69915, + bth_padCnt__h69853, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12878,18 +16327,18 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[166:143], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[232:201], 352'd0 } : - a__h69889 ; - assign a__h69903 = + a__h69827 ; + assign a__h69841 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h69915, + bth_padCnt__h69853, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12900,18 +16349,18 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[709:686], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[199:168], 384'd0 } : - a__h69887 ; - assign a__h69905 = + a__h69825 ; + assign a__h69843 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? { IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_0_ELSE_IF_ETC___d3208, IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[364], 1'd0, - bth_padCnt__h69915, + bth_padCnt__h69853, 4'd0, cntrl_pkeyReg, 8'd0, - x__h63485, + x__h63423, cntrl_sqSigAllReg || sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] && (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[614] || @@ -12924,49 +16373,49 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[166:143], sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[199:168], 352'd0 } : - a__h69889 ; - assign a__h9345 = { 1'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:11] } ; - assign a__h9355 = { 2'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:12] } ; - assign a__h9365 = { 3'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:13] } ; - assign a__h9375 = { 4'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:14] } ; - assign a__h9385 = { 5'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:15] } ; - assign addrChunkResp_chunkLen__h10586 = + a__h69827 ; + assign a__h9283 = { 1'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:11] } ; + assign a__h9293 = { 2'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:12] } ; + assign a__h9303 = { 3'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:13] } ; + assign a__h9313 = { 4'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:14] } ; + assign a__h9323 = { 5'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:15] } ; + assign addrChunkResp_chunkLen__h10524 = (dmaReadCntrl4SQ_addrChunkSrv_pktNumReg_77_BITS_ETC___d366 && NOT_dmaReadCntrl4SQ_addrChunkSrv_pktNumReg_77__ETC___d376 && !dmaReadCntrl4SQ_addrChunkSrv_isZeroResidueReg) ? { 1'd0, dmaReadCntrl4SQ_addrChunkSrv_residueReg } : dmaReadCntrl4SQ_addrChunkSrv_fullPktLenReg ; - assign b__h52254 = + assign b__h52192 = { 4'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[485:478] } ; - assign b__h52264 = + assign b__h52202 = { 3'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[486:478] } ; - assign b__h52274 = + assign b__h52212 = { 2'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[487:478] } ; - assign b__h52284 = + assign b__h52222 = { 1'd0, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[488:478] } ; - assign b__h63244 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? 7'd32 : 7'd28 ; - assign b__h63246 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? 7'd36 : 7'd32 ; - assign b__h63254 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? 7'd16 : 7'd12 ; - assign b__h63258 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? 7'd20 : 7'd16 ; - assign b__h69892 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 7'd16 : 7'd12 ; - assign b__h69894 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 7'd20 : 7'd16 ; - assign b__h9346 = { 4'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[10:3] } ; - assign b__h9356 = { 3'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[11:3] } ; - assign b__h9366 = { 2'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[12:3] } ; - assign b__h9376 = { 1'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[13:3] } ; - assign bits__h49179 = + assign b__h63182 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? 7'd32 : 7'd28 ; + assign b__h63184 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? 7'd36 : 7'd32 ; + assign b__h63192 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? 7'd16 : 7'd12 ; + assign b__h63196 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] ? 7'd20 : 7'd16 ; + assign b__h69830 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 7'd16 : 7'd12 ; + assign b__h69832 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 7'd20 : 7'd16 ; + assign b__h9284 = { 4'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[10:3] } ; + assign b__h9294 = { 3'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[11:3] } ; + assign b__h9304 = { 2'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[12:3] } ; + assign b__h9314 = { 1'd0, dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[13:3] } ; + assign bits__h49117 = { payloadGenerator4SQ_bramQ2PipeOut_postBramQ_fi_ETC___d1852[31], payloadGenerator4SQ_bramQ2PipeOut_postBramQ_fi_ETC___d1852[0] } ; - assign bth_padCnt__h63283 = + assign bth_padCnt__h63221 = (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[7] && sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] != 4'd4 && sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] != 4'd5 && sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618] != 4'd6) ? - padCnt__h63476 : + padCnt__h63414 : 2'd0 ; - assign bth_padCnt__h69915 = - sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? padCnt__h63476 : 2'd0 ; - assign cntrl_stateReg_EQ_3_AND_NOT_sq_respHandleSQ_re_ETC___d5647 = + assign bth_padCnt__h69853 = + sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? padCnt__h63414 : 2'd0 ; + assign cntrl_stateReg_EQ_3_AND_NOT_sq_respHandleSQ_re_ETC___d5653 = cntrl_stateReg == 4'd3 && !sq_respHandleSQ_retryFlushReg && !sq_respHandleSQ_errOccurredReg && !sq_respHandleSQ_recvErrRespReg ; @@ -12982,17 +16431,17 @@ module mkQP(CLK, !sq_respHandleSQ_retryFlushReg && !sq_respHandleSQ_errOccurredReg && !sq_respHandleSQ_recvErrRespReg ; - assign cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_recvEr_ETC___d5683 = + assign cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_recvEr_ETC___d5689 = (cntrl_stateReg == 4'd3 && (sq_respHandleSQ_recvErrRespReg || sq_respHandleSQ_errOccurredReg) || cntrl_stateReg == 4'd6) && sq_pendingWorkReqBuf_emptyReg ; - assign cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5690 = + assign cntrl_stateReg_EQ_3_AND_sq_respHandleSQ_retryF_ETC___d5696 = cntrl_stateReg == 4'd3 && sq_respHandleSQ_retryFlushReg && !sq_respHandleSQ_errOccurredReg && !sq_respHandleSQ_recvErrRespReg ; - assign curPSN__h61636 = + assign curPSN__h61574 = sq_reqGenSQ_isFirstOrOnlyReqPktReg ? sq_reqGenSQ_reqCountQ_D_OUT[81:58] : sq_reqGenSQ_curPsnReg ; @@ -13012,19 +16461,19 @@ module mkQP(CLK, !dmaReadCntrl4SQ_respQ_D_OUT[292] || payloadGenerator4SQ_pendingGenReqQ_EMPTY_N && payloadGenerator4SQ_payloadGenRespQ_FULL_N) ; - assign endPktSeqNum__h56057 = + assign endPktSeqNum__h55995 = sq_reqGenSQ_workReqPsnQ_D_OUT[5] ? cntrl_npsnReg : - nextPktSeqNum__h56056 - 24'd1 ; - assign headerLastFragInvalidByteNum__h47982 = + nextPktSeqNum__h55994 - 24'd1 ; + assign headerLastFragInvalidByteNum__h47920 = 6'd32 - sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[7:2] ; - assign headerLastFragValidBitNum__h47980 = + assign headerLastFragValidBitNum__h47918 = { sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[7:2], 3'd0 } ; - assign lastFragValidByteNumWithPadding__h13828 = - lastFragValidByteNum__h13827 + { 4'd0, padCnt__h13826 } ; - assign lastFragValidByteNum__h13827 = + assign lastFragValidByteNumWithPadding__h13766 = + lastFragValidByteNum__h13765 + { 4'd0, padCnt__h13764 } ; + assign lastFragValidByteNum__h13765 = (payloadGenerator4SQ_payloadGenReqQ_D_OUT[9:8] == 2'd0 && !payloadGenerator4SQ_payloadGenReqQ_D_OUT[7] && payloadGenerator4SQ_payloadGenReqQ_D_OUT[6:5] == 2'd0 && @@ -13045,26 +16494,26 @@ module mkQP(CLK, payloadGenerator4SQ_payloadGenReqQ_D_OUT[13:12] != 2'd0 || payloadGenerator4SQ_payloadGenReqQ_D_OUT[11:10] != 2'd0)) ? 6'd32 : - lastFragValidByteNum__h13849 ; - assign lastFragValidByteNum__h13849 = + lastFragValidByteNum__h13787 ; + assign lastFragValidByteNum__h13787 = { 1'd0, payloadGenerator4SQ_payloadGenReqQ_D_OUT[9:5] } ; - assign lastFragValidByteNum__h87658 = + assign lastFragValidByteNum__h87596 = { 1'd0, sq_reqGenSQ_pendingReqHeaderQ_D_OUT[29:25] } ; - assign leftShiftByteEn__h49542 = + assign leftShiftByteEn__h49480 = sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_preDataStreamReg[33:2] << sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidByteNumReg ; - assign leftShiftData__h49541 = + assign leftShiftData__h49479 = sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_preDataStreamReg[289:34] << sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidBitNumReg ; - assign leftShiftHeaderByteEn__h47319 = { x__h47528[31:0], 32'd0 } ; - assign leftShiftHeaderData__h47318 = { x__h47525[255:0], 256'd0 } ; - assign nextPktSeqNum__h56056 = + assign leftShiftHeaderByteEn__h47257 = { x__h47466[31:0], 32'd0 } ; + assign leftShiftHeaderData__h47256 = { x__h47463[255:0], 256'd0 } ; + assign nextPktSeqNum__h55994 = sq_reqGenSQ_workReqPsnQ_D_OUT[5] ? - startPlusOne__h56122 : - x__h56223[23:0] ; - assign padCnt__h13826 = + startPlusOne__h56060 : + x__h56161[23:0] ; + assign padCnt__h13764 = 2'd0 - payloadGenerator4SQ_payloadGenReqQ_D_OUT[6:5] ; - assign padCnt__h63476 = + assign padCnt__h63414 = 2'd0 - sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[486:485] ; assign payloadGenerator4SQ_bramQ2PipeOut_postBramQ_fi_ETC___d1852 = payloadGenerator4SQ_bramQ2PipeOut_postBramQ_D_OUT[33:2] << @@ -13072,29 +16521,29 @@ module mkQP(CLK, assign payloadGenerator4SQ_payloadBufQ_rRdPtr_read__7_ETC___d487 = payloadGenerator4SQ_payloadBufQ_rRdPtr == payloadGenerator4SQ_payloadBufQ_rWrPtr ; - assign remainingHeaderFragNum__h47317 = + assign remainingHeaderFragNum__h47255 = IF_sq_reqGenSQ_rdmaReqPipeOut_headerDataStream_ETC___d1737 - 2'd1 ; - assign remainingHeaderLen__h47316 = + assign remainingHeaderLen__h47254 = (sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerValidReg ? sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_rdmaHeaderReg[16:10] : sq_reqGenSQ_reqHeaderOutQ_D_OUT[16:10]) - 7'd32 ; - assign remainingPktNum___1__h61681 = + assign remainingPktNum___1__h61619 = sq_reqGenSQ_reqCountQ_D_OUT[31:7] - 25'd2 ; - assign remainingPktNum___1__h61739 = + assign remainingPktNum___1__h61677 = sq_reqGenSQ_remainingPktNumReg - 25'd1 ; assign respPktPipe_metaDataQ_first__626_BITS_554_TO_5_ETC___d4098 = respPktPipe_metaDataQ_D_OUT[554:531] < cntrl_npsnReg ; assign respPktPipe_metaDataQ_first__626_BITS_554_TO_5_ETC___d4109 = - respPktPipe_metaDataQ_D_OUT[554:531] < value__h99966 ; - assign rightShiftHeaderLastFragByteEn__h48758 = + respPktPipe_metaDataQ_D_OUT[554:531] < value__h99904 ; + assign rightShiftHeaderLastFragByteEn__h48696 = sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerDataStreamOutQ_D_OUT[33:2] >> sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidByteNumReg ; - assign rightShiftHeaderLastFragData__h48757 = + assign rightShiftHeaderLastFragData__h48695 = sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerDataStreamOutQ_D_OUT[289:34] >> sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragInvalidBitNumReg ; - assign rnrTimer__h36783 = + assign rnrTimer__h36721 = (sq_retryHandler_retryRnrTimerReg <= cntrl_minRnrTimerReg) ? cntrl_minRnrTimerReg : sq_retryHandler_retryRnrTimerReg ; @@ -13104,13 +16553,13 @@ module mkQP(CLK, assign sq_reqGenSQ_pendingReqHeaderQ_first__424_BITS__ETC___d3563 = { sq_reqGenSQ_pendingReqHeaderQ_D_OUT[31:25], sq_reqGenSQ_pendingReqHeaderQ_D_OUT[31:30] + - { 1'd0, x__h87589 }, + { 1'd0, x__h87527 }, (sq_reqGenSQ_pendingReqHeaderQ_D_OUT[29:28] == 2'd0 && !sq_reqGenSQ_pendingReqHeaderQ_D_OUT[27] && sq_reqGenSQ_pendingReqHeaderQ_D_OUT[26:25] == 2'd0 && sq_reqGenSQ_pendingReqHeaderQ_D_OUT[31:30] != 2'd0) ? 6'd32 : - lastFragValidByteNum__h87658, + lastFragValidByteNum__h87596, sq_reqGenSQ_pendingReqHeaderQ_D_OUT[24], 1'd0 } ; assign sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAnd_ETC___d1747 = @@ -13141,7 +16590,7 @@ module mkQP(CLK, sq_reqGenSQ_workReqPsnQ_D_OUT[4] || sq_reqGenSQ_workReqPsnQ_D_OUT[57], sq_reqGenSQ_workReqPsnQ_D_OUT[4] ? - endPktSeqNum__h56057 : + endPktSeqNum__h55995 : sq_reqGenSQ_workReqPsnQ_D_OUT[56:33], sq_reqGenSQ_workReqPsnQ_D_OUT[32:7], sq_reqGenSQ_workReqPsnQ_D_OUT[4] || @@ -13150,15 +16599,15 @@ module mkQP(CLK, sq_reqGenSQ_workReqPsnQ_D_OUT[5] || sq_reqGenSQ_workReqPsnQ_D_OUT[619:616] == 4'd4 : sq_reqGenSQ_workReqPsnQ_D_OUT[5] } ; - assign sq_respHandleSQ_pendingRetryCheckQ_first__949__ETC___d5046 = + assign sq_respHandleSQ_pendingRetryCheckQ_first__955__ETC___d5052 = (sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd9 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd10 || sq_retryHandler_retryRespQ_EMPTY_N) && - IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5037 && + IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d5043 && (sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd9 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd10 || sq_retryHandler_retryRespQ_EMPTY_N) ; - assign sq_respHandleSQ_pendingRetryCheckQ_first__949__ETC___d5187 = + assign sq_respHandleSQ_pendingRetryCheckQ_first__955__ETC___d5193 = { sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3], sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] == 4'd0 || CASE_sq_respHandleSQ_pendingRetryCheckQD_OUT__ETC__q21, @@ -13301,7 +16750,7 @@ module mkQP(CLK, (sq_retryHandler_updateRetryCntQ_D_OUT[3] ? sq_retryHandler_prepareRetryRespQ_FULL_N : cntrl_stateReg != 4'd0 && cntrl_stateReg != 4'd7) ; - assign sq_workCompGenSQ_dmaWaitingQ_i_notFull__721_AN_ETC___d5767 = + assign sq_workCompGenSQ_dmaWaitingQ_i_notFull__727_AN_ETC___d5773 = sq_workCompGenSQ_dmaWaitingQ_FULL_N && (sq_workCompGenSQ_pendingWorkCompQ4SQ_D_OUT[568:565] != 4'd0 && sq_workCompGenSQ_pendingWorkCompQ4SQ_D_OUT[568:565] != 4'd1 && @@ -13321,26 +16770,26 @@ module mkQP(CLK, sq_workCompGenSQ_pendingWorkCompQ4SQ_D_OUT[568:565] == 4'd5 || sq_workCompGenSQ_pendingWorkCompQ4SQ_D_OUT[568:565] == 4'd6 || cntrl_stateReg != 4'd0 && cntrl_stateReg != 4'd7) ; - assign startPlusOne__h56122 = cntrl_npsnReg + 24'd1 ; - assign tmpByteEn__h49088 = + assign startPlusOne__h56060 = cntrl_npsnReg + 24'd1 ; + assign tmpByteEn__h49026 = { sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_preDataStreamReg[33:2], payloadGenerator4SQ_bramQ2PipeOut_postBramQ_D_OUT[33:2] } >> sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragValidByteNumReg ; - assign tmpData__h49087 = + assign tmpData__h49025 = { sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_preDataStreamReg[289:34], payloadGenerator4SQ_bramQ2PipeOut_postBramQ_D_OUT[289:34] } >> sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerLastFragValidBitNumReg ; - assign totalPktNum__h55209 = + assign totalPktNum__h55147 = sq_reqGenSQ_workReqPktNumQ_D_OUT[3] ? sq_reqGenSQ_workReqPktNumQ_D_OUT[29:5] : sq_reqGenSQ_workReqPktNumQ_D_OUT[29:5] + 25'd1 ; - assign v__h37423 = + assign v__h37361 = (sq_retryHandler_retryReasonReg == 3'd4) ? - value__h99939 : + value__h99877 : sq_retryHandler_retryStartPsnReg ; - assign x__h12662 = payloadGenerator4SQ_payloadBufQ_rWrPtr + 10'd1 ; - assign x__h12913 = payloadGenerator4SQ_payloadBufQ_rRdPtr + 10'd1 ; - assign x__h14424 = + assign x__h12600 = payloadGenerator4SQ_payloadBufQ_rWrPtr + 10'd1 ; + assign x__h12851 = payloadGenerator4SQ_payloadBufQ_rRdPtr + 10'd1 ; + assign x__h14362 = { _1_SL_IF_payloadGenerator4SQ_payloadGenReqQ_fir_ETC___d577[0], _1_SL_IF_payloadGenerator4SQ_payloadGenReqQ_fir_ETC___d577[1], _1_SL_IF_payloadGenerator4SQ_payloadGenReqQ_fir_ETC___d577[2], @@ -13373,64 +16822,64 @@ module mkQP(CLK, _1_SL_IF_payloadGenerator4SQ_payloadGenReqQ_fir_ETC___d577[29], _1_SL_IF_payloadGenerator4SQ_payloadGenReqQ_fir_ETC___d577[30], _1_SL_IF_payloadGenerator4SQ_payloadGenReqQ_fir_ETC___d577[31] } ; - assign x__h16825 = + assign x__h16763 = 8'd1 << CASE_payloadGenerator4SQ_payloadGenReqQD_OUT__ETC__q1 ; - assign x__h33715 = sq_retryHandler_timeOutCntReg - 42'd1 ; - assign x__h35617 = sq_retryHandler_retryCntReg - 3'd1 ; - assign x__h35647 = sq_retryHandler_rnrCntReg - 3'd1 ; - assign x__h37628 = { 1'b1, v__h37423 } - { 1'b0, value__h99939 } ; - assign x__h41815 = + assign x__h33653 = sq_retryHandler_timeOutCntReg - 42'd1 ; + assign x__h35555 = sq_retryHandler_retryCntReg - 3'd1 ; + assign x__h35585 = sq_retryHandler_rnrCntReg - 3'd1 ; + assign x__h37566 = { 1'b1, v__h37361 } - { 1'b0, value__h99877 } ; + assign x__h41753 = sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg + 8'd1 ; - assign x__h41903 = + assign x__h41841 = sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg - 8'd1 ; - assign x__h47525 = + assign x__h47463 = sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerValidReg ? sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_rdmaHeaderReg[592:81] : sq_reqGenSQ_reqHeaderOutQ_D_OUT[592:81] ; - assign x__h47528 = + assign x__h47466 = sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerValidReg ? sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_rdmaHeaderReg[80:17] : sq_reqGenSQ_reqHeaderOutQ_D_OUT[80:17] ; - assign x__h56104 = endPktSeqNum__h56057 + 24'd1 ; - assign x__h56223 = + assign x__h56042 = endPktSeqNum__h55995 + 24'd1 ; + assign x__h56161 = { 1'd0, cntrl_npsnReg } + sq_reqGenSQ_workReqPsnQ_D_OUT[31:7] ; - assign x__h74169 = + assign x__h74107 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[6] ? - value__h63238 : - value__h69886 ; - assign x__h81436 = + value__h63176 : + value__h69824 ; + assign x__h81374 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[6] ? - value__h68654 : - value__h72405 ; - assign x__h87589 = + value__h68592 : + value__h72343 ; + assign x__h87527 = sq_reqGenSQ_pendingReqHeaderQ_D_OUT[29:28] != 2'd0 || sq_reqGenSQ_pendingReqHeaderQ_D_OUT[27] || sq_reqGenSQ_pendingReqHeaderQ_D_OUT[26:25] != 2'd0 ; - assign x__read_byteEn__h12579 = + assign x__read_byteEn__h12517 = CAN_FIRE_RL_payloadGenerator4SQ_lastFragAddPadding ? payloadGenerator4SQ_payloadBufQ_wDataIn_wget[33:2] : 32'd0 ; - assign x__read_data__h12578 = + assign x__read_data__h12516 = CAN_FIRE_RL_payloadGenerator4SQ_lastFragAddPadding ? payloadGenerator4SQ_payloadBufQ_wDataIn_wget[289:34] : 256'd0 ; - assign y__h42773 = cntrl_pendingWorkReqNumReg - 8'd1 ; - assign y_avValue_byteEn__h17055 = + assign y__h42711 = cntrl_pendingWorkReqNumReg - 8'd1 ; + assign y_avValue_byteEn__h16993 = payloadGenerator4SQ_pendingGenReqQ_D_OUT[43] ? payloadGenerator4SQ_pendingGenReqQ_D_OUT[39:8] : dmaReadCntrl4SQ_respQ_D_OUT[35:4] ; - always@(cntrl_reqQ_D_OUT or cntrl_pendingReadAtomicReqNumReg) + always@(cntrl_reqQ_D_OUT or cntrl_npsnReg) begin case (cntrl_reqQ_D_OUT[300:299]) - 2'd0, 2'd1, 2'd2: x__h6243 = cntrl_reqQ_D_OUT[36:29]; - 2'd3: x__h6243 = cntrl_pendingReadAtomicReqNumReg; + 2'd0, 2'd1, 2'd2: x__h6143 = cntrl_reqQ_D_OUT[149:126]; + 2'd3: x__h6143 = cntrl_npsnReg; endcase end - always@(cntrl_reqQ_D_OUT or cntrl_npsnReg) + always@(cntrl_reqQ_D_OUT or cntrl_pendingReadAtomicReqNumReg) begin case (cntrl_reqQ_D_OUT[300:299]) - 2'd0, 2'd1, 2'd2: x__h6205 = cntrl_reqQ_D_OUT[149:126]; - 2'd3: x__h6205 = cntrl_npsnReg; + 2'd0, 2'd1, 2'd2: x__h6181 = cntrl_reqQ_D_OUT[36:29]; + 2'd3: x__h6181 = cntrl_pendingReadAtomicReqNumReg; endcase end always@(payloadGenerator4SQ_payloadGenReqQ_D_OUT) @@ -13447,8 +16896,8 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT or cntrl_dqpnReg) begin case (cntrl_sqTypeReg) - 4'd2, 4'd3, 4'd9: x__h63485 = cntrl_dqpnReg; - default: x__h63485 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[141:118]; + 4'd2, 4'd3, 4'd9: x__h63423 = cntrl_dqpnReg; + default: x__h63423 = sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[141:118]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13457,10 +16906,19 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99740 = sq_pendingWorkReqBuf_dataVec_0[355:292]; - 2'd1: value__h99740 = sq_pendingWorkReqBuf_dataVec_1[355:292]; - 2'd2: value__h99740 = sq_pendingWorkReqBuf_dataVec_2[355:292]; - 2'd3: value__h99740 = sq_pendingWorkReqBuf_dataVec_3[355:292]; + 2'd0: enumBits__h93866 = sq_pendingWorkReqBuf_dataVec_0[610:606]; + 2'd1: enumBits__h93866 = sq_pendingWorkReqBuf_dataVec_1[610:606]; + 2'd2: enumBits__h93866 = sq_pendingWorkReqBuf_dataVec_2[610:606]; + 2'd3: enumBits__h93866 = sq_pendingWorkReqBuf_dataVec_3[610:606]; + endcase + end + always@(sq_respHandleSQ_pendingRespQ_D_OUT) + begin + case (sq_respHandleSQ_pendingRespQ_D_OUT[1408:1405]) + 4'd4, 4'd5, 4'd6: + retryStartPSN__h103743 = sq_respHandleSQ_pendingRespQ_D_OUT[72:49]; + default: retryStartPSN__h103743 = + sq_respHandleSQ_pendingRespQ_D_OUT[870:847]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13469,10 +16927,10 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: enumBits__h93928 = sq_pendingWorkReqBuf_dataVec_0[610:606]; - 2'd1: enumBits__h93928 = sq_pendingWorkReqBuf_dataVec_1[610:606]; - 2'd2: enumBits__h93928 = sq_pendingWorkReqBuf_dataVec_2[610:606]; - 2'd3: enumBits__h93928 = sq_pendingWorkReqBuf_dataVec_3[610:606]; + 2'd0: value__h99678 = sq_pendingWorkReqBuf_dataVec_0[355:292]; + 2'd1: value__h99678 = sq_pendingWorkReqBuf_dataVec_1[355:292]; + 2'd2: value__h99678 = sq_pendingWorkReqBuf_dataVec_2[355:292]; + 2'd3: value__h99678 = sq_pendingWorkReqBuf_dataVec_3[355:292]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13481,10 +16939,10 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99767 = sq_pendingWorkReqBuf_dataVec_0[290:227]; - 2'd1: value__h99767 = sq_pendingWorkReqBuf_dataVec_1[290:227]; - 2'd2: value__h99767 = sq_pendingWorkReqBuf_dataVec_2[290:227]; - 2'd3: value__h99767 = sq_pendingWorkReqBuf_dataVec_3[290:227]; + 2'd0: value__h99705 = sq_pendingWorkReqBuf_dataVec_0[290:227]; + 2'd1: value__h99705 = sq_pendingWorkReqBuf_dataVec_1[290:227]; + 2'd2: value__h99705 = sq_pendingWorkReqBuf_dataVec_2[290:227]; + 2'd3: value__h99705 = sq_pendingWorkReqBuf_dataVec_3[290:227]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13493,10 +16951,10 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99797 = sq_pendingWorkReqBuf_dataVec_0[225:194]; - 2'd1: value__h99797 = sq_pendingWorkReqBuf_dataVec_1[225:194]; - 2'd2: value__h99797 = sq_pendingWorkReqBuf_dataVec_2[225:194]; - 2'd3: value__h99797 = sq_pendingWorkReqBuf_dataVec_3[225:194]; + 2'd0: value__h99735 = sq_pendingWorkReqBuf_dataVec_0[225:194]; + 2'd1: value__h99735 = sq_pendingWorkReqBuf_dataVec_1[225:194]; + 2'd2: value__h99735 = sq_pendingWorkReqBuf_dataVec_2[225:194]; + 2'd3: value__h99735 = sq_pendingWorkReqBuf_dataVec_3[225:194]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13505,10 +16963,10 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99854 = sq_pendingWorkReqBuf_dataVec_0[159:136]; - 2'd1: value__h99854 = sq_pendingWorkReqBuf_dataVec_1[159:136]; - 2'd2: value__h99854 = sq_pendingWorkReqBuf_dataVec_2[159:136]; - 2'd3: value__h99854 = sq_pendingWorkReqBuf_dataVec_3[159:136]; + 2'd0: value__h99762 = sq_pendingWorkReqBuf_dataVec_0[192:161]; + 2'd1: value__h99762 = sq_pendingWorkReqBuf_dataVec_1[192:161]; + 2'd2: value__h99762 = sq_pendingWorkReqBuf_dataVec_2[192:161]; + 2'd3: value__h99762 = sq_pendingWorkReqBuf_dataVec_3[192:161]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13517,10 +16975,10 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99824 = sq_pendingWorkReqBuf_dataVec_0[192:161]; - 2'd1: value__h99824 = sq_pendingWorkReqBuf_dataVec_1[192:161]; - 2'd2: value__h99824 = sq_pendingWorkReqBuf_dataVec_2[192:161]; - 2'd3: value__h99824 = sq_pendingWorkReqBuf_dataVec_3[192:161]; + 2'd0: value__h99792 = sq_pendingWorkReqBuf_dataVec_0[159:136]; + 2'd1: value__h99792 = sq_pendingWorkReqBuf_dataVec_1[159:136]; + 2'd2: value__h99792 = sq_pendingWorkReqBuf_dataVec_2[159:136]; + 2'd3: value__h99792 = sq_pendingWorkReqBuf_dataVec_3[159:136]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13529,10 +16987,10 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99881 = sq_pendingWorkReqBuf_dataVec_0[134:111]; - 2'd1: value__h99881 = sq_pendingWorkReqBuf_dataVec_1[134:111]; - 2'd2: value__h99881 = sq_pendingWorkReqBuf_dataVec_2[134:111]; - 2'd3: value__h99881 = sq_pendingWorkReqBuf_dataVec_3[134:111]; + 2'd0: value__h99819 = sq_pendingWorkReqBuf_dataVec_0[134:111]; + 2'd1: value__h99819 = sq_pendingWorkReqBuf_dataVec_1[134:111]; + 2'd2: value__h99819 = sq_pendingWorkReqBuf_dataVec_2[134:111]; + 2'd3: value__h99819 = sq_pendingWorkReqBuf_dataVec_3[134:111]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13541,10 +16999,10 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99908 = sq_pendingWorkReqBuf_dataVec_0[109:78]; - 2'd1: value__h99908 = sq_pendingWorkReqBuf_dataVec_1[109:78]; - 2'd2: value__h99908 = sq_pendingWorkReqBuf_dataVec_2[109:78]; - 2'd3: value__h99908 = sq_pendingWorkReqBuf_dataVec_3[109:78]; + 2'd0: value__h99846 = sq_pendingWorkReqBuf_dataVec_0[109:78]; + 2'd1: value__h99846 = sq_pendingWorkReqBuf_dataVec_1[109:78]; + 2'd2: value__h99846 = sq_pendingWorkReqBuf_dataVec_2[109:78]; + 2'd3: value__h99846 = sq_pendingWorkReqBuf_dataVec_3[109:78]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13553,10 +17011,10 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99939 = sq_pendingWorkReqBuf_dataVec_0[76:53]; - 2'd1: value__h99939 = sq_pendingWorkReqBuf_dataVec_1[76:53]; - 2'd2: value__h99939 = sq_pendingWorkReqBuf_dataVec_2[76:53]; - 2'd3: value__h99939 = sq_pendingWorkReqBuf_dataVec_3[76:53]; + 2'd0: value__h99877 = sq_pendingWorkReqBuf_dataVec_0[76:53]; + 2'd1: value__h99877 = sq_pendingWorkReqBuf_dataVec_1[76:53]; + 2'd2: value__h99877 = sq_pendingWorkReqBuf_dataVec_2[76:53]; + 2'd3: value__h99877 = sq_pendingWorkReqBuf_dataVec_3[76:53]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13565,21 +17023,21 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: value__h99966 = sq_pendingWorkReqBuf_dataVec_0[51:28]; - 2'd1: value__h99966 = sq_pendingWorkReqBuf_dataVec_1[51:28]; - 2'd2: value__h99966 = sq_pendingWorkReqBuf_dataVec_2[51:28]; - 2'd3: value__h99966 = sq_pendingWorkReqBuf_dataVec_3[51:28]; + 2'd0: value__h99904 = sq_pendingWorkReqBuf_dataVec_0[51:28]; + 2'd1: value__h99904 = sq_pendingWorkReqBuf_dataVec_1[51:28]; + 2'd2: value__h99904 = sq_pendingWorkReqBuf_dataVec_2[51:28]; + 2'd3: value__h99904 = sq_pendingWorkReqBuf_dataVec_3[51:28]; endcase end always@(dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT or - a__h9385 or a__h9345 or a__h9355 or a__h9365 or a__h9375) + a__h9323 or a__h9283 or a__h9293 or a__h9303 or a__h9313) begin case (dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[2:0]) - 3'd1: tmpPktNum__h9229 = a__h9345; - 3'd2: tmpPktNum__h9229 = a__h9355; - 3'd3: tmpPktNum__h9229 = a__h9365; - 3'd4: tmpPktNum__h9229 = a__h9375; - default: tmpPktNum__h9229 = a__h9385; + 3'd1: tmpPktNum__h9167 = a__h9283; + 3'd2: tmpPktNum__h9167 = a__h9293; + 3'd3: tmpPktNum__h9167 = a__h9303; + 3'd4: tmpPktNum__h9167 = a__h9313; + default: tmpPktNum__h9167 = a__h9323; endcase end always@(cntrl_sqTypeReg) @@ -13589,11 +17047,11 @@ module mkQP(CLK, default: CASE_cntrl_sqTypeReg_2_28_3_28_32__q2 = 7'd32; endcase end - always@(cntrl_sqTypeReg or b__h63246 or b__h63244) + always@(cntrl_sqTypeReg or b__h63184 or b__h63182) begin case (cntrl_sqTypeReg) - 4'd2, 4'd3: CASE_cntrl_sqTypeReg_2_b3244_3_b3244_b3246__q3 = b__h63244; - default: CASE_cntrl_sqTypeReg_2_b3244_3_b3244_b3246__q3 = b__h63246; + 4'd2, 4'd3: CASE_cntrl_sqTypeReg_2_b3182_3_b3182_b3184__q3 = b__h63182; + default: CASE_cntrl_sqTypeReg_2_b3182_3_b3182_b3184__q3 = b__h63184; endcase end always@(cntrl_sqTypeReg) @@ -13604,108 +17062,71 @@ module mkQP(CLK, default: CASE_cntrl_sqTypeReg_2_12_3_12_4_20_16__q4 = 7'd16; endcase end - always@(cntrl_sqTypeReg or b__h63258 or b__h63254) + always@(cntrl_sqTypeReg or b__h63196 or b__h63192) begin case (cntrl_sqTypeReg) 4'd2, 4'd3: - CASE_cntrl_sqTypeReg_2_b3254_3_b3254_4_24_b3258__q5 = b__h63254; - 4'd4: CASE_cntrl_sqTypeReg_2_b3254_3_b3254_4_24_b3258__q5 = 7'd24; - default: CASE_cntrl_sqTypeReg_2_b3254_3_b3254_4_24_b3258__q5 = - b__h63258; + CASE_cntrl_sqTypeReg_2_b3192_3_b3192_4_24_b3196__q5 = b__h63192; + 4'd4: CASE_cntrl_sqTypeReg_2_b3192_3_b3192_4_24_b3196__q5 = 7'd24; + default: CASE_cntrl_sqTypeReg_2_b3192_3_b3192_4_24_b3196__q5 = + b__h63196; endcase end always@(sq_reqGenSQ_reqHeaderPrepareQ_D_OUT or cntrl_sqTypeReg or CASE_cntrl_sqTypeReg_2_28_3_28_32__q2 or - CASE_cntrl_sqTypeReg_2_b3244_3_b3244_b3246__q3 or + CASE_cntrl_sqTypeReg_2_b3182_3_b3182_b3184__q3 or CASE_cntrl_sqTypeReg_2_12_3_12_4_20_16__q4 or - CASE_cntrl_sqTypeReg_2_b3254_3_b3254_4_24_b3258__q5 or - b__h63254 or b__h63258) + CASE_cntrl_sqTypeReg_2_b3192_3_b3192_4_24_b3196__q5 or + b__h63192 or b__h63196) begin case (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618]) - 4'd0: value__h68654 = CASE_cntrl_sqTypeReg_2_28_3_28_32__q2; - 4'd1: value__h68654 = CASE_cntrl_sqTypeReg_2_b3244_3_b3244_b3246__q3; - 4'd2: value__h68654 = CASE_cntrl_sqTypeReg_2_12_3_12_4_20_16__q4; + 4'd0: value__h68592 = CASE_cntrl_sqTypeReg_2_28_3_28_32__q2; + 4'd1: value__h68592 = CASE_cntrl_sqTypeReg_2_b3182_3_b3182_b3184__q3; + 4'd2: value__h68592 = CASE_cntrl_sqTypeReg_2_12_3_12_4_20_16__q4; 4'd3: - value__h68654 = CASE_cntrl_sqTypeReg_2_b3254_3_b3254_4_24_b3258__q5; - 4'd4: value__h68654 = (cntrl_sqTypeReg == 4'd2) ? 7'd28 : 7'd32; - 4'd9: value__h68654 = (cntrl_sqTypeReg == 4'd2) ? b__h63254 : b__h63258; - default: value__h68654 = (cntrl_sqTypeReg == 4'd2) ? 7'd40 : 7'd44; + value__h68592 = CASE_cntrl_sqTypeReg_2_b3192_3_b3192_4_24_b3196__q5; + 4'd4: value__h68592 = (cntrl_sqTypeReg == 4'd2) ? 7'd28 : 7'd32; + 4'd9: value__h68592 = (cntrl_sqTypeReg == 4'd2) ? b__h63192 : b__h63196; + default: value__h68592 = (cntrl_sqTypeReg == 4'd2) ? 7'd40 : 7'd44; endcase end always@(cntrl_pmtuReg or - sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT or - b__h52254 or b__h52264 or b__h52274 or b__h52284) + a__h52231 or a__h52191 or a__h52201 or a__h52211 or a__h52221) begin case (cntrl_pmtuReg) - 3'd1: x__h52371 = b__h52254; - 3'd2: x__h52371 = b__h52264; - 3'd3: x__h52371 = b__h52274; - 3'd4: x__h52371 = b__h52284; - default: x__h52371 = - sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[489:478]; + 3'd1: x__h52180 = a__h52191; + 3'd2: x__h52180 = a__h52201; + 3'd3: x__h52180 = a__h52211; + 3'd4: x__h52180 = a__h52221; + default: x__h52180 = a__h52231; endcase end always@(cntrl_pmtuReg or - a__h52293 or a__h52253 or a__h52263 or a__h52273 or a__h52283) + sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT or + b__h52192 or b__h52202 or b__h52212 or b__h52222) begin case (cntrl_pmtuReg) - 3'd1: x__h52242 = a__h52253; - 3'd2: x__h52242 = a__h52263; - 3'd3: x__h52242 = a__h52273; - 3'd4: x__h52242 = a__h52283; - default: x__h52242 = a__h52293; + 3'd1: x__h52309 = b__h52192; + 3'd2: x__h52309 = b__h52202; + 3'd3: x__h52309 = b__h52212; + 3'd4: x__h52309 = b__h52222; + default: x__h52309 = + sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[489:478]; endcase end always@(dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT or - b__h9346 or b__h9356 or b__h9366 or b__h9376) + b__h9284 or b__h9294 or b__h9304 or b__h9314) begin case (dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[2:0]) - 3'd1: pmtuResidue__h9230 = b__h9346; - 3'd2: pmtuResidue__h9230 = b__h9356; - 3'd3: pmtuResidue__h9230 = b__h9366; - 3'd4: pmtuResidue__h9230 = b__h9376; - default: pmtuResidue__h9230 = + 3'd1: pmtuResidue__h9168 = b__h9284; + 3'd2: pmtuResidue__h9168 = b__h9294; + 3'd3: pmtuResidue__h9168 = b__h9304; + 3'd4: pmtuResidue__h9168 = b__h9314; + default: pmtuResidue__h9168 = dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[14:3]; endcase end - always@(cntrl_maxTimeOutReg) - begin - case (cntrl_maxTimeOutReg) - 5'd0: x__h32835 = 42'd0; - 5'd1: x__h32835 = 42'd1366; - 5'd2: x__h32835 = 42'd2731; - 5'd3: x__h32835 = 42'd5462; - 5'd4: x__h32835 = 42'd10923; - 5'd5: x__h32835 = 42'd21846; - 5'd6: x__h32835 = 42'd43691; - 5'd7: x__h32835 = 42'd87382; - 5'd8: x__h32835 = 42'd174763; - 5'd9: x__h32835 = 42'd349526; - 5'd10: x__h32835 = 42'd699051; - 5'd11: x__h32835 = 42'd1398102; - 5'd12: x__h32835 = 42'd2796203; - 5'd13: x__h32835 = 42'd5592406; - 5'd14: x__h32835 = 42'd11184811; - 5'd15: x__h32835 = 42'd22369622; - 5'd16: x__h32835 = 42'd44739243; - 5'd17: x__h32835 = 42'd89478486; - 5'd18: x__h32835 = 42'd178956971; - 5'd19: x__h32835 = 42'd357913942; - 5'd20: x__h32835 = 42'd715827883; - 5'd21: x__h32835 = 42'd1431655766; - 5'd22: x__h32835 = 42'h000AAAAAAAB; - 5'd23: x__h32835 = 42'h00155555556; - 5'd24: x__h32835 = 42'h002AAAAAAAB; - 5'd25: x__h32835 = 42'h00555555556; - 5'd26: x__h32835 = 42'h00AAAAAAAAB; - 5'd27: x__h32835 = 42'h01555555556; - 5'd28: x__h32835 = 42'h02AAAAAAAAB; - 5'd29: x__h32835 = 42'h05555555556; - 5'd30: x__h32835 = 42'h0AAAAAAAAAB; - 5'd31: x__h32835 = 42'h15555555556; - endcase - end always@(cntrl_reqQ_D_OUT or cntrl_stateReg) begin case (cntrl_reqQ_D_OUT[300:299]) @@ -13717,15 +17138,41 @@ module mkQP(CLK, cntrl_stateReg; endcase end - always@(cntrl_reqQ_D_OUT or cntrl_pkeyReg) + always@(cntrl_maxTimeOutReg) begin - case (cntrl_reqQ_D_OUT[300:299]) - 2'd0, 2'd1, 2'd2: - IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d99 = - cntrl_reqQ_D_OUT[53:38]; - 2'd3: - IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d99 = - cntrl_pkeyReg; + case (cntrl_maxTimeOutReg) + 5'd0: x__h32773 = 42'd0; + 5'd1: x__h32773 = 42'd1366; + 5'd2: x__h32773 = 42'd2731; + 5'd3: x__h32773 = 42'd5462; + 5'd4: x__h32773 = 42'd10923; + 5'd5: x__h32773 = 42'd21846; + 5'd6: x__h32773 = 42'd43691; + 5'd7: x__h32773 = 42'd87382; + 5'd8: x__h32773 = 42'd174763; + 5'd9: x__h32773 = 42'd349526; + 5'd10: x__h32773 = 42'd699051; + 5'd11: x__h32773 = 42'd1398102; + 5'd12: x__h32773 = 42'd2796203; + 5'd13: x__h32773 = 42'd5592406; + 5'd14: x__h32773 = 42'd11184811; + 5'd15: x__h32773 = 42'd22369622; + 5'd16: x__h32773 = 42'd44739243; + 5'd17: x__h32773 = 42'd89478486; + 5'd18: x__h32773 = 42'd178956971; + 5'd19: x__h32773 = 42'd357913942; + 5'd20: x__h32773 = 42'd715827883; + 5'd21: x__h32773 = 42'd1431655766; + 5'd22: x__h32773 = 42'h000AAAAAAAB; + 5'd23: x__h32773 = 42'h00155555556; + 5'd24: x__h32773 = 42'h002AAAAAAAB; + 5'd25: x__h32773 = 42'h00555555556; + 5'd26: x__h32773 = 42'h00AAAAAAAAB; + 5'd27: x__h32773 = 42'h01555555556; + 5'd28: x__h32773 = 42'h02AAAAAAAAB; + 5'd29: x__h32773 = 42'h05555555556; + 5'd30: x__h32773 = 42'h0AAAAAAAAAB; + 5'd31: x__h32773 = 42'h15555555556; endcase end always@(cntrl_reqQ_D_OUT or cntrl_qpAccessFlagsReg) @@ -13753,6 +17200,17 @@ module mkQP(CLK, cntrl_maxRnrCntReg }; endcase end + always@(cntrl_reqQ_D_OUT or cntrl_pkeyReg) + begin + case (cntrl_reqQ_D_OUT[300:299]) + 2'd0, 2'd1, 2'd2: + IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d99 = + cntrl_reqQ_D_OUT[53:38]; + 2'd3: + IF_cntrl_reqQ_first__7_BITS_300_TO_299_8_EQ_1__ETC___d99 = + cntrl_pkeyReg; + endcase + end always@(sq_pendingWorkReqBuf_scanPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or @@ -13853,26 +17311,6 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_3[678:615]; endcase end - always@(sq_pendingWorkReqBuf_deqPtrReg or - sq_pendingWorkReqBuf_dataVec_0 or - sq_pendingWorkReqBuf_dataVec_1 or - sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) - begin - case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: - SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473 = - !sq_pendingWorkReqBuf_dataVec_0[77]; - 2'd1: - SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473 = - !sq_pendingWorkReqBuf_dataVec_1[77]; - 2'd2: - SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473 = - !sq_pendingWorkReqBuf_dataVec_2[77]; - 2'd3: - SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473 = - !sq_pendingWorkReqBuf_dataVec_3[77]; - endcase - end always@(sq_pendingWorkReqBuf_deqPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or @@ -13920,17 +17358,17 @@ module mkQP(CLK, begin case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491 = - !sq_pendingWorkReqBuf_dataVec_0[52]; + SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473 = + !sq_pendingWorkReqBuf_dataVec_0[77]; 2'd1: - SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491 = - !sq_pendingWorkReqBuf_dataVec_1[52]; + SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473 = + !sq_pendingWorkReqBuf_dataVec_1[77]; 2'd2: - SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491 = - !sq_pendingWorkReqBuf_dataVec_2[52]; + SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473 = + !sq_pendingWorkReqBuf_dataVec_2[77]; 2'd3: - SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491 = - !sq_pendingWorkReqBuf_dataVec_3[52]; + SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473 = + !sq_pendingWorkReqBuf_dataVec_3[77]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13940,17 +17378,17 @@ module mkQP(CLK, begin case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620 = - sq_pendingWorkReqBuf_dataVec_0[357]; + SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491 = + !sq_pendingWorkReqBuf_dataVec_0[52]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620 = - sq_pendingWorkReqBuf_dataVec_1[357]; + SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491 = + !sq_pendingWorkReqBuf_dataVec_1[52]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620 = - sq_pendingWorkReqBuf_dataVec_2[357]; + SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491 = + !sq_pendingWorkReqBuf_dataVec_2[52]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620 = - sq_pendingWorkReqBuf_dataVec_3[357]; + SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491 = + !sq_pendingWorkReqBuf_dataVec_3[52]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -13979,26 +17417,26 @@ module mkQP(CLK, begin case (cntrl_pmtuReg) 3'd1: - x__h39125 = + x__h39063 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[63:8] + { 32'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[7:0] }; 3'd2: - x__h39125 = + x__h39063 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[63:9] + { 31'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[8:0] }; 3'd3: - x__h39125 = + x__h39063 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[63:10] + { 30'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[9:0] }; 3'd4: - x__h39125 = + x__h39063 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[63:11] + { 29'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[10:0] }; - default: x__h39125 = + default: x__h39063 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[63:12] + { 28'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1525[11:0] }; @@ -14030,51 +17468,31 @@ module mkQP(CLK, begin case (cntrl_pmtuReg) 3'd1: - x__h39664 = + x__h39602 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[63:8] + { 32'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[7:0] }; 3'd2: - x__h39664 = + x__h39602 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[63:9] + { 31'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[8:0] }; 3'd3: - x__h39664 = + x__h39602 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[63:10] + { 30'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[9:0] }; 3'd4: - x__h39664 = + x__h39602 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[63:11] + { 29'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[10:0] }; - default: x__h39664 = + default: x__h39602 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[63:12] + { 28'd0, sq_retryHandler_psnDiffReg }, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1592[11:0] }; endcase end - always@(sq_pendingWorkReqBuf_deqPtrReg or - sq_pendingWorkReqBuf_dataVec_0 or - sq_pendingWorkReqBuf_dataVec_1 or - sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) - begin - case (sq_pendingWorkReqBuf_deqPtrReg) - 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621 = - sq_pendingWorkReqBuf_dataVec_0[356]; - 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621 = - sq_pendingWorkReqBuf_dataVec_1[356]; - 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621 = - sq_pendingWorkReqBuf_dataVec_2[356]; - 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621 = - sq_pendingWorkReqBuf_dataVec_3[356]; - endcase - end always@(sq_pendingWorkReqBuf_scanPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or @@ -14102,17 +17520,17 @@ module mkQP(CLK, begin case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631 = - sq_pendingWorkReqBuf_dataVec_0[160]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621 = + sq_pendingWorkReqBuf_dataVec_0[356]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631 = - sq_pendingWorkReqBuf_dataVec_1[160]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621 = + sq_pendingWorkReqBuf_dataVec_1[356]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631 = - sq_pendingWorkReqBuf_dataVec_2[160]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621 = + sq_pendingWorkReqBuf_dataVec_2[356]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631 = - sq_pendingWorkReqBuf_dataVec_3[160]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1621 = + sq_pendingWorkReqBuf_dataVec_3[356]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -14135,6 +17553,26 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_3[226]; endcase end + always@(sq_pendingWorkReqBuf_deqPtrReg or + sq_pendingWorkReqBuf_dataVec_0 or + sq_pendingWorkReqBuf_dataVec_1 or + sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) + begin + case (sq_pendingWorkReqBuf_deqPtrReg) + 2'd0: + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631 = + sq_pendingWorkReqBuf_dataVec_0[160]; + 2'd1: + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631 = + sq_pendingWorkReqBuf_dataVec_1[160]; + 2'd2: + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631 = + sq_pendingWorkReqBuf_dataVec_2[160]; + 2'd3: + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1631 = + sq_pendingWorkReqBuf_dataVec_3[160]; + endcase + end always@(sq_pendingWorkReqBuf_deqPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or @@ -14175,43 +17613,43 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_3[135]; endcase end - always@(sq_pendingWorkReqBuf_deqPtrReg or + always@(sq_pendingWorkReqBuf_scanPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin - case (sq_pendingWorkReqBuf_deqPtrReg) + case (sq_pendingWorkReqBuf_scanPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d878 = sq_pendingWorkReqBuf_dataVec_0[193]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d878 = sq_pendingWorkReqBuf_dataVec_1[193]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d878 = sq_pendingWorkReqBuf_dataVec_2[193]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d878 = sq_pendingWorkReqBuf_dataVec_3[193]; endcase end - always@(sq_pendingWorkReqBuf_scanPtrReg or + always@(sq_pendingWorkReqBuf_deqPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin - case (sq_pendingWorkReqBuf_scanPtrReg) + case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d878 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629 = sq_pendingWorkReqBuf_dataVec_0[193]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d878 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629 = sq_pendingWorkReqBuf_dataVec_1[193]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d878 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629 = sq_pendingWorkReqBuf_dataVec_2[193]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d878 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1629 = sq_pendingWorkReqBuf_dataVec_3[193]; endcase end @@ -14235,6 +17673,26 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_3[291]; endcase end + always@(sq_pendingWorkReqBuf_deqPtrReg or + sq_pendingWorkReqBuf_dataVec_0 or + sq_pendingWorkReqBuf_dataVec_1 or + sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) + begin + case (sq_pendingWorkReqBuf_deqPtrReg) + 2'd0: + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620 = + sq_pendingWorkReqBuf_dataVec_0[357]; + 2'd1: + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620 = + sq_pendingWorkReqBuf_dataVec_1[357]; + 2'd2: + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620 = + sq_pendingWorkReqBuf_dataVec_2[357]; + 2'd3: + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1620 = + sq_pendingWorkReqBuf_dataVec_3[357]; + endcase + end always@(sq_pendingWorkReqBuf_scanPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or @@ -14275,83 +17733,83 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_3[357]; endcase end - always@(sq_pendingWorkReqBuf_deqPtrReg or + always@(sq_pendingWorkReqBuf_scanPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin - case (sq_pendingWorkReqBuf_deqPtrReg) + case (sq_pendingWorkReqBuf_scanPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810 = sq_pendingWorkReqBuf_dataVec_0[413:382]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810 = sq_pendingWorkReqBuf_dataVec_1[413:382]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810 = sq_pendingWorkReqBuf_dataVec_2[413:382]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810 = sq_pendingWorkReqBuf_dataVec_3[413:382]; endcase end - always@(sq_pendingWorkReqBuf_scanPtrReg or + always@(sq_pendingWorkReqBuf_deqPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin - case (sq_pendingWorkReqBuf_scanPtrReg) + case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618 = sq_pendingWorkReqBuf_dataVec_0[413:382]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618 = sq_pendingWorkReqBuf_dataVec_1[413:382]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618 = sq_pendingWorkReqBuf_dataVec_2[413:382]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d810 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1618 = sq_pendingWorkReqBuf_dataVec_3[413:382]; endcase end - always@(sq_pendingWorkReqBuf_scanPtrReg or + always@(sq_pendingWorkReqBuf_deqPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin - case (sq_pendingWorkReqBuf_scanPtrReg) + case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d984 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649 = sq_pendingWorkReqBuf_dataVec_0[27]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d984 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649 = sq_pendingWorkReqBuf_dataVec_1[27]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d984 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649 = sq_pendingWorkReqBuf_dataVec_2[27]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d984 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649 = sq_pendingWorkReqBuf_dataVec_3[27]; endcase end - always@(sq_pendingWorkReqBuf_deqPtrReg or + always@(sq_pendingWorkReqBuf_scanPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) begin - case (sq_pendingWorkReqBuf_deqPtrReg) + case (sq_pendingWorkReqBuf_scanPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d984 = sq_pendingWorkReqBuf_dataVec_0[27]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d984 = sq_pendingWorkReqBuf_dataVec_1[27]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d984 = sq_pendingWorkReqBuf_dataVec_2[27]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1649 = + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d984 = sq_pendingWorkReqBuf_dataVec_3[27]; endcase end @@ -14421,26 +17879,26 @@ module mkQP(CLK, begin case (cntrl_pmtuReg) 3'd1: - x__h39399 = + x__h39337 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[31:8] - sq_retryHandler_psnDiffReg, SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[7:0] }; 3'd2: - x__h39399 = + x__h39337 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[31:9] - sq_retryHandler_psnDiffReg[22:0], SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[8:0] }; 3'd3: - x__h39399 = + x__h39337 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[31:10] - sq_retryHandler_psnDiffReg[21:0], SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[9:0] }; 3'd4: - x__h39399 = + x__h39337 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[31:11] - sq_retryHandler_psnDiffReg[20:0], SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[10:0] }; - default: x__h39399 = + default: x__h39337 = { SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[31:12] - sq_retryHandler_psnDiffReg[19:0], SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1562[11:0] }; @@ -14489,6 +17947,25 @@ module mkQP(CLK, endcase end always@(sq_reqGenSQ_reqHeaderPrepareQ_D_OUT) + begin + case (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618]) + 4'd0: + IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = + sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd8 : 5'd7; + 4'd1: + IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = + sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd9 : 5'd7; + 4'd2: + IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = + sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd2 : 5'd1; + 4'd3: + IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = + sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd3 : 5'd1; + default: IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = + sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd22 : 5'd1; + endcase + end + always@(sq_reqGenSQ_reqHeaderPrepareQ_D_OUT) begin case (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618]) 4'd0: @@ -14514,102 +17991,83 @@ module mkQP(CLK, 5'd20; endcase end - always@(cntrl_sqTypeReg or a__h63241 or a__h63239) + always@(cntrl_sqTypeReg or a__h63179 or a__h63177) begin case (cntrl_sqTypeReg) - 4'd2, 4'd3: CASE_cntrl_sqTypeReg_2_a3239_3_a3239_a3241__q6 = a__h63239; - default: CASE_cntrl_sqTypeReg_2_a3239_3_a3239_a3241__q6 = a__h63241; + 4'd2, 4'd3: CASE_cntrl_sqTypeReg_2_a3177_3_a3177_a3179__q6 = a__h63177; + default: CASE_cntrl_sqTypeReg_2_a3177_3_a3177_a3179__q6 = a__h63179; endcase end - always@(cntrl_sqTypeReg or a__h63245 or a__h63243) + always@(cntrl_sqTypeReg or a__h63183 or a__h63181) begin case (cntrl_sqTypeReg) - 4'd2, 4'd3: CASE_cntrl_sqTypeReg_2_a3243_3_a3243_a3245__q7 = a__h63243; - default: CASE_cntrl_sqTypeReg_2_a3243_3_a3243_a3245__q7 = a__h63245; + 4'd2, 4'd3: CASE_cntrl_sqTypeReg_2_a3181_3_a3181_a3183__q7 = a__h63181; + default: CASE_cntrl_sqTypeReg_2_a3181_3_a3181_a3183__q7 = a__h63183; endcase end - always@(cntrl_sqTypeReg or a__h63251 or a__h63247 or a__h63249) + always@(cntrl_sqTypeReg or a__h63189 or a__h63185 or a__h63187) begin case (cntrl_sqTypeReg) 4'd2, 4'd3: - CASE_cntrl_sqTypeReg_2_a3247_3_a3247_4_a3249_a_ETC__q8 = a__h63247; + CASE_cntrl_sqTypeReg_2_a3185_3_a3185_4_a3187_a_ETC__q8 = a__h63185; 4'd4: - CASE_cntrl_sqTypeReg_2_a3247_3_a3247_4_a3249_a_ETC__q8 = a__h63249; - default: CASE_cntrl_sqTypeReg_2_a3247_3_a3247_4_a3249_a_ETC__q8 = - a__h63251; + CASE_cntrl_sqTypeReg_2_a3185_3_a3185_4_a3187_a_ETC__q8 = a__h63187; + default: CASE_cntrl_sqTypeReg_2_a3185_3_a3185_4_a3187_a_ETC__q8 = + a__h63189; endcase end - always@(cntrl_sqTypeReg or a__h63257 or a__h63253 or a__h63255) + always@(cntrl_sqTypeReg or a__h63195 or a__h63191 or a__h63193) begin case (cntrl_sqTypeReg) 4'd2, 4'd3: - CASE_cntrl_sqTypeReg_2_a3253_3_a3253_4_a3255_a_ETC__q9 = a__h63253; + CASE_cntrl_sqTypeReg_2_a3191_3_a3191_4_a3193_a_ETC__q9 = a__h63191; 4'd4: - CASE_cntrl_sqTypeReg_2_a3253_3_a3253_4_a3255_a_ETC__q9 = a__h63255; - default: CASE_cntrl_sqTypeReg_2_a3253_3_a3253_4_a3255_a_ETC__q9 = - a__h63257; + CASE_cntrl_sqTypeReg_2_a3191_3_a3191_4_a3193_a_ETC__q9 = a__h63193; + default: CASE_cntrl_sqTypeReg_2_a3191_3_a3191_4_a3193_a_ETC__q9 = + a__h63195; endcase end always@(sq_reqGenSQ_reqHeaderPrepareQ_D_OUT or cntrl_sqTypeReg or - a__h63269 or - a__h63272 or - CASE_cntrl_sqTypeReg_2_a3239_3_a3239_a3241__q6 or - CASE_cntrl_sqTypeReg_2_a3243_3_a3243_a3245__q7 or - CASE_cntrl_sqTypeReg_2_a3247_3_a3247_4_a3249_a_ETC__q8 or - CASE_cntrl_sqTypeReg_2_a3253_3_a3253_4_a3255_a_ETC__q9 or - a__h63239 or a__h63241 or a__h63259 or a__h63261) + a__h63207 or + a__h63210 or + CASE_cntrl_sqTypeReg_2_a3177_3_a3177_a3179__q6 or + CASE_cntrl_sqTypeReg_2_a3181_3_a3181_a3183__q7 or + CASE_cntrl_sqTypeReg_2_a3185_3_a3185_4_a3187_a_ETC__q8 or + CASE_cntrl_sqTypeReg_2_a3191_3_a3191_4_a3193_a_ETC__q9 or + a__h63177 or a__h63179 or a__h63197 or a__h63199) begin case (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618]) - 4'd0: value__h63238 = CASE_cntrl_sqTypeReg_2_a3239_3_a3239_a3241__q6; - 4'd1: value__h63238 = CASE_cntrl_sqTypeReg_2_a3243_3_a3243_a3245__q7; + 4'd0: value__h63176 = CASE_cntrl_sqTypeReg_2_a3177_3_a3177_a3179__q6; + 4'd1: value__h63176 = CASE_cntrl_sqTypeReg_2_a3181_3_a3181_a3183__q7; 4'd2: - value__h63238 = - CASE_cntrl_sqTypeReg_2_a3247_3_a3247_4_a3249_a_ETC__q8; + value__h63176 = + CASE_cntrl_sqTypeReg_2_a3185_3_a3185_4_a3187_a_ETC__q8; 4'd3: - value__h63238 = - CASE_cntrl_sqTypeReg_2_a3253_3_a3253_4_a3255_a_ETC__q9; - 4'd4: value__h63238 = (cntrl_sqTypeReg == 4'd2) ? a__h63239 : a__h63241; - 4'd9: value__h63238 = (cntrl_sqTypeReg == 4'd2) ? a__h63259 : a__h63261; - default: value__h63238 = - (cntrl_sqTypeReg == 4'd2) ? a__h63269 : a__h63272; - endcase - end - always@(sq_reqGenSQ_reqHeaderPrepareQ_D_OUT) - begin - case (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618]) - 4'd0: - IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = - sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd8 : 5'd7; - 4'd1: - IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = - sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd9 : 5'd7; - 4'd2: - IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = - sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd2 : 5'd1; - 4'd3: - IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = - sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd3 : 5'd1; - default: IF_sq_reqGenSQ_reqHeaderPrepareQ_first__665_BI_ETC___d3300 = - sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] ? 5'd22 : 5'd1; + value__h63176 = + CASE_cntrl_sqTypeReg_2_a3191_3_a3191_4_a3193_a_ETC__q9; + 4'd4: value__h63176 = (cntrl_sqTypeReg == 4'd2) ? a__h63177 : a__h63179; + 4'd9: value__h63176 = (cntrl_sqTypeReg == 4'd2) ? a__h63197 : a__h63199; + default: value__h63176 = + (cntrl_sqTypeReg == 4'd2) ? a__h63207 : a__h63210; endcase end always@(sq_reqGenSQ_reqHeaderPrepareQ_D_OUT or cntrl_sqTypeReg or - a__h69903 or - a__h69905 or + a__h69841 or + a__h69843 or IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_cntrl__ETC___d3311 or IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_sq_req_ETC___d3316) begin case (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618]) 4'd0, 4'd2: - value__h69886 = + value__h69824 = IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_cntrl__ETC___d3311; 4'd1, 4'd3: - value__h69886 = + value__h69824 = IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_sq_req_ETC___d3316; - default: value__h69886 = - (cntrl_sqTypeReg == 4'd2) ? a__h69903 : a__h69905; + default: value__h69824 = + (cntrl_sqTypeReg == 4'd2) ? a__h69841 : a__h69843; endcase end always@(sq_reqGenSQ_reqHeaderPrepareQ_D_OUT or @@ -14618,12 +18076,12 @@ module mkQP(CLK, begin case (sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[621:618]) 4'd0, 4'd2: - value__h72405 = + value__h72343 = IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_12_ELSE_16___d3346; 4'd1: - value__h72405 = + value__h72343 = IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_sq_req_ETC___d3349; - default: value__h72405 = + default: value__h72343 = IF_cntrl_sqTypeReg_887_EQ_2_888_THEN_IF_sq_req_ETC___d3349; endcase end @@ -14854,17 +18312,17 @@ module mkQP(CLK, begin case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3896 = - sq_pendingWorkReqBuf_dataVec_0[614:611] == 4'd11; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3915 = + sq_pendingWorkReqBuf_dataVec_0[614:611] == 4'd12; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3896 = - sq_pendingWorkReqBuf_dataVec_1[614:611] == 4'd11; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3915 = + sq_pendingWorkReqBuf_dataVec_1[614:611] == 4'd12; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3896 = - sq_pendingWorkReqBuf_dataVec_2[614:611] == 4'd11; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3915 = + sq_pendingWorkReqBuf_dataVec_2[614:611] == 4'd12; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3896 = - sq_pendingWorkReqBuf_dataVec_3[614:611] == 4'd11; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3915 = + sq_pendingWorkReqBuf_dataVec_3[614:611] == 4'd12; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -14874,17 +18332,17 @@ module mkQP(CLK, begin case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3915 = - sq_pendingWorkReqBuf_dataVec_0[614:611] == 4'd12; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3896 = + sq_pendingWorkReqBuf_dataVec_0[614:611] == 4'd11; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3915 = - sq_pendingWorkReqBuf_dataVec_1[614:611] == 4'd12; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3896 = + sq_pendingWorkReqBuf_dataVec_1[614:611] == 4'd11; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3915 = - sq_pendingWorkReqBuf_dataVec_2[614:611] == 4'd12; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3896 = + sq_pendingWorkReqBuf_dataVec_2[614:611] == 4'd11; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3915 = - sq_pendingWorkReqBuf_dataVec_3[614:611] == 4'd12; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d3896 = + sq_pendingWorkReqBuf_dataVec_3[614:611] == 4'd11; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -15356,9 +18814,9 @@ module mkQP(CLK, begin case (sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3]) 4'd1, 4'd3: - IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d4989 = + IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d4995 = sq_respHandleSQ_pendingRetryCheckQ_EMPTY_N; - default: IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d4989 = + default: IF_sq_respHandleSQ_pendingRetryCheckQ_first__9_ETC___d4995 = sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] == 4'd5 || sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] == 4'd6 || sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] == 4'd4 || @@ -15434,17 +18892,17 @@ module mkQP(CLK, begin case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636 = - sq_pendingWorkReqBuf_dataVec_0[110]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619 = + sq_pendingWorkReqBuf_dataVec_0[381:358]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636 = - sq_pendingWorkReqBuf_dataVec_1[110]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619 = + sq_pendingWorkReqBuf_dataVec_1[381:358]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636 = - sq_pendingWorkReqBuf_dataVec_2[110]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619 = + sq_pendingWorkReqBuf_dataVec_2[381:358]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636 = - sq_pendingWorkReqBuf_dataVec_3[110]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619 = + sq_pendingWorkReqBuf_dataVec_3[381:358]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -15454,17 +18912,17 @@ module mkQP(CLK, begin case (sq_pendingWorkReqBuf_deqPtrReg) 2'd0: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619 = - sq_pendingWorkReqBuf_dataVec_0[381:358]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636 = + sq_pendingWorkReqBuf_dataVec_0[110]; 2'd1: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619 = - sq_pendingWorkReqBuf_dataVec_1[381:358]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636 = + sq_pendingWorkReqBuf_dataVec_1[110]; 2'd2: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619 = - sq_pendingWorkReqBuf_dataVec_2[381:358]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636 = + sq_pendingWorkReqBuf_dataVec_2[110]; 2'd3: - SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1619 = - sq_pendingWorkReqBuf_dataVec_3[381:358]; + SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BIT__ETC___d1636 = + sq_pendingWorkReqBuf_dataVec_3[110]; endcase end always@(sq_pendingWorkReqBuf_deqPtrReg or @@ -15687,6 +19145,26 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_3[109:78]; endcase end + always@(sq_pendingWorkReqBuf_scanPtrReg or + sq_pendingWorkReqBuf_dataVec_0 or + sq_pendingWorkReqBuf_dataVec_1 or + sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) + begin + case (sq_pendingWorkReqBuf_scanPtrReg) + 2'd0: + SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888 = + sq_pendingWorkReqBuf_dataVec_0[192:161]; + 2'd1: + SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888 = + sq_pendingWorkReqBuf_dataVec_1[192:161]; + 2'd2: + SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888 = + sq_pendingWorkReqBuf_dataVec_2[192:161]; + 2'd3: + SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888 = + sq_pendingWorkReqBuf_dataVec_3[192:161]; + endcase + end always@(sq_pendingWorkReqBuf_scanPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or @@ -15727,26 +19205,6 @@ module mkQP(CLK, sq_pendingWorkReqBuf_dataVec_3[290:227]; endcase end - always@(sq_pendingWorkReqBuf_scanPtrReg or - sq_pendingWorkReqBuf_dataVec_0 or - sq_pendingWorkReqBuf_dataVec_1 or - sq_pendingWorkReqBuf_dataVec_2 or sq_pendingWorkReqBuf_dataVec_3) - begin - case (sq_pendingWorkReqBuf_scanPtrReg) - 2'd0: - SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888 = - sq_pendingWorkReqBuf_dataVec_0[192:161]; - 2'd1: - SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888 = - sq_pendingWorkReqBuf_dataVec_1[192:161]; - 2'd2: - SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888 = - sq_pendingWorkReqBuf_dataVec_2[192:161]; - 2'd3: - SEL_ARR_IF_sq_pendingWorkReqBuf_dataVec_0_59_B_ETC___d888 = - sq_pendingWorkReqBuf_dataVec_3[192:161]; - endcase - end always@(sq_pendingWorkReqBuf_scanPtrReg or sq_pendingWorkReqBuf_dataVec_0 or sq_pendingWorkReqBuf_dataVec_1 or @@ -15929,7 +19387,7 @@ module mkQP(CLK, endcase end always@(sq_respHandleSQ_pendingRetryCheckQ_D_OUT or - IF_sq_retryHandler_retryRespQ_first__023_THEN__ETC___d5182) + IF_sq_retryHandler_retryRespQ_first__029_THEN__ETC___d5188) begin case (sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3]) 4'd0, 4'd1, 4'd2, 4'd3, 4'd4, 4'd5, 4'd6, 4'd7: @@ -15937,7 +19395,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[2:1]; 4'd9, 4'd10: CASE_sq_respHandleSQ_pendingRetryCheckQD_OUT__ETC__q24 = - IF_sq_retryHandler_retryRespQ_first__023_THEN__ETC___d5182; + IF_sq_retryHandler_retryRespQ_first__029_THEN__ETC___d5188; default: CASE_sq_respHandleSQ_pendingRetryCheckQD_OUT__ETC__q24 = sq_respHandleSQ_pendingRetryCheckQ_D_OUT[2:1]; endcase @@ -16085,41 +19543,41 @@ module mkQP(CLK, endcase end always@(sq_respHandleSQ_preStageRespAndWorkReqRelationReg or - IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4312 or - IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4308) + IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4302 or + IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4298) begin case (sq_respHandleSQ_preStageRespAndWorkReqRelationReg[3:0]) 4'b0001, 4'b0010: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31 = - IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4312; + IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4302; 4'b0100: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31 = sq_respHandleSQ_preStageRespAndWorkReqRelationReg[4] ? - 2'd2 : - 2'd0; + 4'd7 : + 4'd6; 4'b1000, 4'b1010: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31 = - IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4308; - default: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31 = 2'd2; + IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4298; + default: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q31 = 4'd8; endcase end always@(sq_respHandleSQ_preStageRespAndWorkReqRelationReg or - IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4302 or - IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4298) + IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4312 or + IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4308) begin case (sq_respHandleSQ_preStageRespAndWorkReqRelationReg[3:0]) 4'b0001, 4'b0010: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32 = - IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4302; + IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4312; 4'b0100: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32 = sq_respHandleSQ_preStageRespAndWorkReqRelationReg[4] ? - 4'd7 : - 4'd6; + 2'd2 : + 2'd0; 4'b1000, 4'b1010: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32 = - IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4298; - default: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32 = 4'd8; + IF_sq_respHandleSQ_preStageRespTypeReg_177_EQ__ETC___d4308; + default: CASE_sq_respHandleSQ_preStageRespAndWorkReqRel_ETC__q32 = 2'd2; endcase end always@(sq_respHandleSQ_pendingRespQ_D_OUT) @@ -16209,8 +19667,6 @@ module mkQP(CLK, 301'h0AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA; payloadGenerator4SQ_payloadBufQ_rRdPtr <= `BSV_ASSIGNMENT_DELAY 10'd0; payloadGenerator4SQ_payloadBufQ_rWrPtr <= `BSV_ASSIGNMENT_DELAY 10'd0; - rqDmaReadCancelReg <= `BSV_ASSIGNMENT_DELAY 1'd0; - rqDmaWriteCancelReg <= `BSV_ASSIGNMENT_DELAY 1'd0; sqDmaReadCancelReg <= `BSV_ASSIGNMENT_DELAY 1'd0; sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg <= `BSV_ASSIGNMENT_DELAY 8'd0; @@ -16299,11 +19755,6 @@ module mkQP(CLK, if (payloadGenerator4SQ_payloadBufQ_rWrPtr_EN) payloadGenerator4SQ_payloadBufQ_rWrPtr <= `BSV_ASSIGNMENT_DELAY payloadGenerator4SQ_payloadBufQ_rWrPtr_D_IN; - if (rqDmaReadCancelReg_EN) - rqDmaReadCancelReg <= `BSV_ASSIGNMENT_DELAY rqDmaReadCancelReg_D_IN; - if (rqDmaWriteCancelReg_EN) - rqDmaWriteCancelReg <= `BSV_ASSIGNMENT_DELAY - rqDmaWriteCancelReg_D_IN; if (sqDmaReadCancelReg_EN) sqDmaReadCancelReg <= `BSV_ASSIGNMENT_DELAY sqDmaReadCancelReg_D_IN; if (sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg_EN) @@ -16644,8 +20095,6 @@ module mkQP(CLK, 301'h0AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA; payloadGenerator4SQ_payloadBufQ_rRdPtr = 10'h2AA; payloadGenerator4SQ_payloadBufQ_rWrPtr = 10'h2AA; - rqDmaReadCancelReg = 1'h0; - rqDmaWriteCancelReg = 1'h0; sqDmaReadCancelReg = 1'h0; sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg = 8'hAA; sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_decrReg = 1'h0; @@ -16754,13 +20203,13 @@ module mkQP(CLK, if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onINIT && cntrl_reqQ_D_OUT[300:299] == 2'd1) begin - v__h3884 = $time; + v__h3822 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onINIT && cntrl_reqQ_D_OUT[300:299] == 2'd1) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h3884, + v__h3822, "\"Controller.bsv\", line 512, column 21\n", "no QP destroy on init @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16777,7 +20226,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) begin - v__h4313 = $time; + v__h4251 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -16785,7 +20234,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h4313, + v__h4251, "\"Controller.bsv\", line 540, column 21\n", "unreachible case @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16804,13 +20253,13 @@ module mkQP(CLK, if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onRTR && cntrl_reqQ_D_OUT[300:299] == 2'd1) begin - v__h4717 = $time; + v__h4655 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onRTR && cntrl_reqQ_D_OUT[300:299] == 2'd1) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h4717, + v__h4655, "\"Controller.bsv\", line 576, column 21\n", "no QP destroy on RTR @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16827,7 +20276,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) begin - v__h5169 = $time; + v__h5107 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -16835,7 +20284,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h5169, + v__h5107, "\"Controller.bsv\", line 615, column 21\n", "unreachible case @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16854,13 +20303,13 @@ module mkQP(CLK, if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onRTS && cntrl_reqQ_D_OUT[300:299] == 2'd1) begin - v__h5606 = $time; + v__h5544 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onRTS && cntrl_reqQ_D_OUT[300:299] == 2'd1) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h5606, + v__h5544, "\"Controller.bsv\", line 651, column 21\n", "no QP destroy on RTS @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16877,7 +20326,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) begin - v__h5829 = $time; + v__h5767 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -16885,7 +20334,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h5829, + v__h5767, "\"Controller.bsv\", line 688, column 21\n", "unreachible case @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16904,13 +20353,13 @@ module mkQP(CLK, if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onSQD && cntrl_reqQ_D_OUT[300:299] == 2'd1) begin - v__h6391 = $time; + v__h6329 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onSQD && cntrl_reqQ_D_OUT[300:299] == 2'd1) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h6391, + v__h6329, "\"Controller.bsv\", line 721, column 21\n", "no QP destroy on SQD @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16927,7 +20376,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) begin - v__h6614 = $time; + v__h6552 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -16935,7 +20384,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h6614, + v__h6552, "\"Controller.bsv\", line 758, column 21\n", "unreachible case @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16956,7 +20405,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) begin - v__h7317 = $time; + v__h7255 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -16964,7 +20413,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h7317, + v__h7255, "\"Controller.bsv\", line 807, column 21\n", "unreachible case @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -16984,14 +20433,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_dmaReadCntrl4SQ_addrChunkSrv_recvReq && dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:3] == 32'd0) begin - v__h9162 = $time; + v__h9100 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_dmaReadCntrl4SQ_addrChunkSrv_recvReq && dmaReadCntrl4SQ_addrChunkSrv_reqQ_D_OUT[34:3] == 32'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h9162, + v__h9100, "\"PayloadConAndGen.bsv\", line 76, column 13\n", "totalLen assertion @ mkAddrChunkSrv"); if (RST_N != `BSV_RESET_VALUE) @@ -17007,14 +20456,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_payloadGenerator4SQ_recvPayloadGenReq && payloadGenerator4SQ_payloadGenReqQ_D_OUT[36:5] == 32'd0) begin - v__h13758 = $time; + v__h13696 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_payloadGenerator4SQ_recvPayloadGenReq && payloadGenerator4SQ_payloadGenReqQ_D_OUT[36:5] == 32'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h13758, + v__h13696, "\"PayloadConAndGen.bsv\", line 656, column 13\n", "payloadGenReq.dmaReadMetaData.len assertion @ mkPayloadGenerator"); if (RST_N != `BSV_RESET_VALUE) @@ -17028,41 +20477,41 @@ module mkQP(CLK, $finish(32'd1); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_payloadGenerator4SQ_recvPayloadGenReq && - lastFragValidByteNumWithPadding__h13828 == 6'd0) + lastFragValidByteNumWithPadding__h13766 == 6'd0) begin - v__h14296 = $time; + v__h14234 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_payloadGenerator4SQ_recvPayloadGenReq && - lastFragValidByteNumWithPadding__h13828 == 6'd0) + lastFragValidByteNumWithPadding__h13766 == 6'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h14296, + v__h14234, "\"PayloadConAndGen.bsv\", line 671, column 13\n", "lastFragValidByteNumWithPadding assertion @ mkPayloadGenerator"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_payloadGenerator4SQ_recvPayloadGenReq && - lastFragValidByteNumWithPadding__h13828 == 6'd0) + lastFragValidByteNumWithPadding__h13766 == 6'd0) $display("lastFragValidByteNumWithPadding=%0d should not be zero", - lastFragValidByteNumWithPadding__h13828, + lastFragValidByteNumWithPadding__h13766, ", totalDmaLen=%0d, lastFragValidByteNum=%0d, padCnt=%0d", payloadGenerator4SQ_payloadGenReqQ_D_OUT[36:5], - lastFragValidByteNum__h13827, - padCnt__h13826); + lastFragValidByteNum__h13765, + padCnt__h13764); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_payloadGenerator4SQ_recvPayloadGenReq && - lastFragValidByteNumWithPadding__h13828 == 6'd0) + lastFragValidByteNumWithPadding__h13766 == 6'd0) $finish(32'd1); if (RST_N != `BSV_RESET_VALUE) if (NOT_sq_newPendingWorkReqPiptOut_pendingNewWork_ETC___d1707) begin - v__h43308 = $time; + v__h43246 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (NOT_sq_newPendingWorkReqPiptOut_pendingNewWork_ETC___d1707) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h43308, + v__h43246, "\"QueuePair.bsv\", line 135, column 13\n", "pendingNewWorkReqCnt assertion @ mkNewPendingWorkReqPipeOut"); if (RST_N != `BSV_RESET_VALUE) @@ -17078,7 +20527,7 @@ module mkQP(CLK, cntrl_sqTypeReg != 4'd9 && cntrl_sqTypeReg != 4'd4) begin - v__h50137 = $time; + v__h50075 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -17087,7 +20536,7 @@ module mkQP(CLK, cntrl_sqTypeReg != 4'd9 && cntrl_sqTypeReg != 4'd4) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h50137, + v__h50075, "\"ReqGenSQ.bsv\", line 630, column 13\n", "qpType assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -17123,7 +20572,7 @@ module mkQP(CLK, cntrl_sqTypeReg != 4'd2 && cntrl_sqTypeReg != 4'd9) begin - v__h50289 = $time; + v__h50227 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -17131,7 +20580,7 @@ module mkQP(CLK, cntrl_sqTypeReg != 4'd2 && cntrl_sqTypeReg != 4'd9) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h50289, + v__h50227, "\"ReqGenSQ.bsv\", line 641, column 17\n", "SQD assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -17178,13 +20627,13 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_reqGenSQ_recvWorkReq && cntrl_stateReg == 4'd3 && sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[606]) begin - v__h50515 = $time; + v__h50453 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_reqGenSQ_recvWorkReq && cntrl_stateReg == 4'd3 && sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[606]) - $display("time=%0t: wait pendingWorkReqBufNotEmpty=", v__h50515); + $display("time=%0t: wait pendingWorkReqBufNotEmpty=", v__h50453); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_reqGenSQ_recvWorkReq && cntrl_stateReg == 4'd3 && sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[606] && @@ -17203,14 +20652,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_reqGenSQ_recvWorkReq && NOT_sq_pendingWorkReqPipeOut_pipeMuxOutQ_first_ETC___d1919) begin - v__h50628 = $time; + v__h50566 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_reqGenSQ_recvWorkReq && NOT_sq_pendingWorkReqPipeOut_pipeMuxOutQ_first_ETC___d1919) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h50628, + v__h50566, "\"ReqGenSQ.bsv\", line 667, column 13\n", "curPendingWR.wr.sqpn assertion @ mkWorkReq2RdmaReq"); if (RST_N != `BSV_RESET_VALUE) @@ -17229,7 +20678,7 @@ module mkQP(CLK, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[614:611] == 4'd6) && sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[509:478] != 32'd8) begin - v__h50773 = $time; + v__h50711 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -17238,7 +20687,7 @@ module mkQP(CLK, sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[614:611] == 4'd6) && sq_pendingWorkReqPipeOut_pipeMuxOutQ_D_OUT[509:478] != 32'd8) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h50773, + v__h50711, "\"ReqGenSQ.bsv\", line 677, column 17\n", "curPendingWR.wr.len assertion @ mkWorkReq2RdmaReq"); if (RST_N != `BSV_RESET_VALUE) @@ -17686,7 +21135,7 @@ module mkQP(CLK, !sq_reqGenSQ_workReqPktNumQ_D_OUT[57] || !sq_reqGenSQ_workReqPktNumQ_D_OUT[31])) begin - v__h54300 = $time; + v__h54238 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -17697,7 +21146,7 @@ module mkQP(CLK, !sq_reqGenSQ_workReqPktNumQ_D_OUT[57] || !sq_reqGenSQ_workReqPktNumQ_D_OUT[31])) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h54300, + v__h54238, "\"ReqGenSQ.bsv\", line 789, column 17\n", "curPendingWR assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -18370,7 +21819,7 @@ module mkQP(CLK, sq_reqGenSQ_workReqCheckQ_D_OUT[1] && !sq_reqGenSQ_workReqCheckQ_D_OUT[5]) begin - v__h58741 = $time; + v__h58679 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -18379,7 +21828,7 @@ module mkQP(CLK, sq_reqGenSQ_workReqCheckQ_D_OUT[1] && !sq_reqGenSQ_workReqCheckQ_D_OUT[5]) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h58741, + v__h58679, "\"ReqGenSQ.bsv\", line 874, column 17\n", "existing UD WR assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -18466,14 +21915,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_reqGenSQ_countReqPkt && cntrl_sqTypeReg == 4'd4 && !sq_reqGenSQ_reqCountQ_D_OUT[5]) begin - v__h61335 = $time; + v__h61273 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_reqGenSQ_countReqPkt && cntrl_sqTypeReg == 4'd4 && !sq_reqGenSQ_reqCountQ_D_OUT[5]) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h61335, + v__h61273, "\"ReqGenSQ.bsv\", line 933, column 13\n", "UD assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -18509,7 +21958,7 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[6] && NOT_cntrl_sqTypeReg_887_EQ_2_888_889_AND_NOT_c_ETC___d2712) begin - v__h63194 = $time; + v__h63132 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -18517,7 +21966,7 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[6] && NOT_cntrl_sqTypeReg_887_EQ_2_888_889_AND_NOT_c_ETC___d2712) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h63194, + v__h63132, "\"ReqGenSQ.bsv\", line 1006, column 17\n", "maybeFirstOrOnlyHeaderGenInfo assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -18929,7 +22378,7 @@ module mkQP(CLK, !sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[6] && NOT_cntrl_sqTypeReg_887_EQ_2_888_889_AND_NOT_c_ETC___d2723) begin - v__h69848 = $time; + v__h69786 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -18937,7 +22386,7 @@ module mkQP(CLK, !sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[6] && NOT_cntrl_sqTypeReg_887_EQ_2_888_889_AND_NOT_c_ETC___d2723) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h69848, + v__h69786, "\"ReqGenSQ.bsv\", line 1021, column 17\n", "maybeMiddleOrLastHeaderGenInfo assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -19342,7 +22791,7 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] && NOT_sq_reqGenSQ_reqHeaderPrepareQ_first__665_B_ETC___d2992) begin - v__h73012 = $time; + v__h72950 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -19351,7 +22800,7 @@ module mkQP(CLK, sq_reqGenSQ_reqHeaderPrepareQ_D_OUT[5] && NOT_sq_reqGenSQ_reqHeaderPrepareQ_first__665_B_ETC___d2992) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h73012, + v__h72950, "\"ReqGenSQ.bsv\", line 1034, column 21\n", "endPSN assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -19921,7 +23370,7 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[7:2] != 6'd0) begin - v__h48088 = $time; + v__h48026 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -19930,7 +23379,7 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[7:2] != 6'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h48088, + v__h48026, "\"ExtractAndPrependPipeOut.bsv\", line 291, column 17\n", "empty header assertion @ mkPrependHeader2PipeOut"); if (RST_N != `BSV_RESET_VALUE) @@ -19939,7 +23388,7 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[7:2] != 6'd0) $display("headerLastFragValidBitNum=%0d", - headerLastFragValidBitNum__h47980, + headerLastFragValidBitNum__h47918, " and headerLastFragValidByteNum=%0d", sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[7:2], " should be zero when isEmptyHeader="); @@ -19961,7 +23410,7 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[16:10] == 7'd0) begin - v__h48212 = $time; + v__h48150 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -19970,7 +23419,7 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_headerDataStreamAndMetaDataPipeOut_headerMetaDataOutQ_D_OUT[16:10] == 7'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h48212, + v__h48150, "\"ExtractAndPrependPipeOut.bsv\", line 303, column 17\n", "headerMetaData.headerLen non-zero assertion @ mkPrependHeader2PipeOut"); if (RST_N != `BSV_RESET_VALUE) @@ -19994,7 +23443,7 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerFragCntReg != 2'd0) begin - v__h48664 = $time; + v__h48602 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -20003,7 +23452,7 @@ module mkQP(CLK, sq_reqGenSQ_rdmaReqPipeOut_rdmaDataStreamPipeOut_headerFragCntReg != 2'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h48664, + v__h48602, "\"ExtractAndPrependPipeOut.bsv\", line 339, column 17\n", "headerFragCntReg zero assertion @ mkPrependHeader2PipeOut"); if (RST_N != `BSV_RESET_VALUE) @@ -20029,7 +23478,7 @@ module mkQP(CLK, respPktPipe_metaDataQ_D_OUT[623:619] != 5'd17 && respPktPipe_metaDataQ_D_OUT[623:619] != 5'd18) begin - v__h93157 = $time; + v__h93095 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -20041,7 +23490,7 @@ module mkQP(CLK, respPktPipe_metaDataQ_D_OUT[623:619] != 5'd17 && respPktPipe_metaDataQ_D_OUT[623:619] != 5'd18) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h93157, + v__h93095, "\"RespHandleSQ.bsv\", line 219, column 13\n", "isRdmaRespOpCode assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -20182,7 +23631,7 @@ module mkQP(CLK, respPktPipe_metaDataQ_D_OUT[527:523] != 5'd3 && respPktPipe_metaDataQ_D_OUT[527:523] != 5'd4))) begin - v__h93514 = $time; + v__h93452 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -20202,7 +23651,7 @@ module mkQP(CLK, respPktPipe_metaDataQ_D_OUT[527:523] != 5'd3 && respPktPipe_metaDataQ_D_OUT[527:523] != 5'd4))) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h93514, + v__h93452, "\"RespHandleSQ.bsv\", line 233, column 13\n", "rdmaRespType assertion @ handleRetryResp() in mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -20291,14 +23740,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) begin - v__h93774 = $time; + v__h93712 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h93774, + v__h93712, "\"RespHandleSQ.bsv\", line 262, column 13\n", "curPendingWR assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -20411,66 +23860,66 @@ module mkQP(CLK, if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) - $display("FlagsType { flags: ", enumBits__h93928, " = "); + $display("FlagsType { flags: ", enumBits__h93866, " = "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - enumBits__h93928[0]) + enumBits__h93866[0]) $display("IBV_SEND_FENCE", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - !enumBits__h93928[0]) + !enumBits__h93866[0]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - enumBits__h93928[1]) + enumBits__h93866[1]) $display("IBV_SEND_SIGNALED", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - !enumBits__h93928[1]) + !enumBits__h93866[1]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - enumBits__h93928[2]) + enumBits__h93866[2]) $display("IBV_SEND_SOLICITED", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - !enumBits__h93928[2]) + !enumBits__h93866[2]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - enumBits__h93928[3]) + enumBits__h93866[3]) $display("IBV_SEND_INLINE", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - !enumBits__h93928[3]) + !enumBits__h93866[3]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - enumBits__h93928[4]) + enumBits__h93866[4]) $display("IBV_SEND_IP_CSUM", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - !enumBits__h93928[4]) + !enumBits__h93866[4]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - enumBits__h93928 == 5'd0) + enumBits__h93866 == 5'd0) $display("IBV_SEND_NO_FLAGS", " }"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && - enumBits__h93928 != 5'd0) + enumBits__h93866 != 5'd0) $display("}"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && @@ -20506,7 +23955,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4003) - $display("tagged Valid ", "'h%h", value__h99740); + $display("tagged Valid ", "'h%h", value__h99678); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20520,7 +23969,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4012) - $display("tagged Valid ", "'h%h", value__h99767); + $display("tagged Valid ", "'h%h", value__h99705); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20534,7 +23983,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4021) - $display("tagged Valid ", "'h%h", value__h99797); + $display("tagged Valid ", "'h%h", value__h99735); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20548,7 +23997,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4030) - $display("tagged Valid ", "'h%h", value__h99824); + $display("tagged Valid ", "'h%h", value__h99762); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20562,7 +24011,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4039) - $display("tagged Valid ", "'h%h", value__h99854); + $display("tagged Valid ", "'h%h", value__h99792); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20576,7 +24025,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4048) - $display("tagged Valid ", "'h%h", value__h99881); + $display("tagged Valid ", "'h%h", value__h99819); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20590,7 +24039,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4057) - $display("tagged Valid ", "'h%h", value__h99908); + $display("tagged Valid ", "'h%h", value__h99846); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20608,7 +24057,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473) - $display("tagged Valid ", "'h%h", value__h99939); + $display("tagged Valid ", "'h%h", value__h99877); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20622,7 +24071,7 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746 && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491) - $display("tagged Valid ", "'h%h", value__h99966); + $display("tagged Valid ", "'h%h", value__h99904); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preBuildRespInfo && NOT_SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d3746) @@ -20683,7 +24132,7 @@ module mkQP(CLK, sq_reqGenSQ_workReqPsnQ_D_OUT[4] && NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2536) begin - v__h57516 = $time; + v__h57454 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -20691,7 +24140,7 @@ module mkQP(CLK, sq_reqGenSQ_workReqPsnQ_D_OUT[4] && NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2536) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h57516, + v__h57454, "\"ReqGenSQ.bsv\", line 828, column 17\n", "startPSN, endPSN, nextPSN assertion @ mkReqGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -20699,10 +24148,10 @@ module mkQP(CLK, sq_reqGenSQ_workReqPsnQ_D_OUT[4] && NOT_IF_IF_sq_reqGenSQ_workReqPsnQ_first__498_B_ETC___d2536) $display("endPSN=%h should >= startPSN=%h, and endPSN=%h + 1 should == nextPSN=%h", - endPktSeqNum__h56057, + endPktSeqNum__h55995, cntrl_npsnReg, - endPktSeqNum__h56057, - nextPktSeqNum__h56056); + endPktSeqNum__h55995, + nextPktSeqNum__h55994); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_reqGenSQ_calcPktSeqNum4NewWorkReq && sq_reqGenSQ_workReqPsnQ_D_OUT[4] && @@ -20712,14 +24161,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preProcRespInfo && sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4187) begin - v__h97761 = $time; + v__h97699 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preProcRespInfo && sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4187) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h97761, + v__h97699, "\"RespHandleSQ.bsv\", line 361, column 33\n", "unreachible case @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -20738,14 +24187,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preProcRespInfo && sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4200) begin - v__h97941 = $time; + v__h97879 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preProcRespInfo && sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4200) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h97941, + v__h97879, "\"RespHandleSQ.bsv\", line 399, column 33\n", "unreachible case @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -20764,14 +24213,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_preProcRespInfo && sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4203) begin - v__h98281 = $time; + v__h98219 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_preProcRespInfo && sq_respHandleSQ_preStagePktMetaDataReg_170_BIT_ETC___d4203) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h98281, + v__h98219, "\"RespHandleSQ.bsv\", line 414, column 13\n", "wrAckType and wcReqType assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -20924,7 +24373,7 @@ module mkQP(CLK, sq_respHandleSQ_preStageRespAndWorkReqRelationReg[3:0] == 4'b0100 && sq_respHandleSQ_preStageRespAndWorkReqRelationReg[4]) begin - v__h98457 = $time; + v__h98395 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -20933,7 +24382,7 @@ module mkQP(CLK, sq_respHandleSQ_preStageRespAndWorkReqRelationReg[3:0] == 4'b0100 && sq_respHandleSQ_preStageRespAndWorkReqRelationReg[4]) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h98457, + v__h98395, "\"RespHandleSQ.bsv\", line 423, column 13\n", "deqPktMetaData and deqPendingWorkReq assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -21012,7 +24461,7 @@ module mkQP(CLK, sq_respHandleSQ_incomingRespQ_D_OUT[3:0] != 4'd12 && sq_respHandleSQ_incomingRespQ_D_OUT[3:0] != 4'd13) begin - v__h101559 = $time; + v__h101497 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -21032,7 +24481,7 @@ module mkQP(CLK, sq_respHandleSQ_incomingRespQ_D_OUT[3:0] != 4'd12 && sq_respHandleSQ_incomingRespQ_D_OUT[3:0] != 4'd13) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h101559, + v__h101497, "\"RespHandleSQ.bsv\", line 616, column 21\n", "unreachible case @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -21090,14 +24539,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && sq_respHandleSQ_retryFlushReg_616_AND_NOT_sq_r_ETC___d4697) begin - v__h101795 = $time; + v__h101733 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && sq_respHandleSQ_retryFlushReg_616_AND_NOT_sq_r_ETC___d4697) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h101795, + v__h101733, "\"RespHandleSQ.bsv\", line 625, column 17\n", "respAction retry flush assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -21187,14 +24636,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && NOT_sq_respHandleSQ_retryFlushReg_616_617_OR_s_ETC___d4756) begin - v__h101959 = $time; + v__h101897 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && NOT_sq_respHandleSQ_retryFlushReg_616_617_OR_s_ETC___d4756) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h101959, + v__h101897, "\"RespHandleSQ.bsv\", line 647, column 17\n", "respAction assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -21226,7 +24675,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingRespQ_D_OUT[9:6] != 4'd7 && sq_respHandleSQ_pendingRespQ_D_OUT[9:6] != 4'd8) begin - v__h103981 = $time; + v__h104001 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -21242,8 +24691,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingRespQ_D_OUT[9:6] != 4'd7 && sq_respHandleSQ_pendingRespQ_D_OUT[9:6] != 4'd8) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h103981, - "\"RespHandleSQ.bsv\", line 728, column 21\n", + v__h104001, + "\"RespHandleSQ.bsv\", line 732, column 21\n", "unreachible case @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_handleRespByType && @@ -21308,7 +24757,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingRespQ_D_OUT[9:6]) == 4'd13) begin - v__h104178 = $time; + v__h104198 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -21320,8 +24769,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingRespQ_D_OUT[9:6]) == 4'd13) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h104178, - "\"RespHandleSQ.bsv\", line 736, column 13\n", + v__h104198, + "\"RespHandleSQ.bsv\", line 740, column 13\n", "respAction assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_handleRespByType && @@ -21368,7 +24817,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[138:134] != 5'd17 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[138:134] != 5'd18) begin - v__h106970 = $time; + v__h106950 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -21380,8 +24829,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[138:134] != 5'd17 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[138:134] != 5'd18) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h106970, - "\"RespHandleSQ.bsv\", line 822, column 21\n", + v__h106950, + "\"RespHandleSQ.bsv\", line 826, column 21\n", "rdmaRespHasAETH assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_checkRetryErr && @@ -21428,7 +24877,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[42:38] != 5'd3 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[42:38] != 5'd4)) begin - v__h107194 = $time; + v__h107174 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -21440,8 +24889,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[42:38] != 5'd3 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[42:38] != 5'd4)) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h107194, - "\"RespHandleSQ.bsv\", line 831, column 21\n", + v__h107174, + "\"RespHandleSQ.bsv\", line 835, column 21\n", "isValid(wcStatus) assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_checkRetryErr && @@ -21603,7 +25052,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd10 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd8) begin - v__h107798 = $time; + v__h107778 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -21620,8 +25069,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd10 && sq_respHandleSQ_pendingRetryCheckQ_D_OUT[6:3] != 4'd8) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h107798, - "\"RespHandleSQ.bsv\", line 906, column 21\n", + v__h107778, + "\"RespHandleSQ.bsv\", line 910, column 21\n", "unreachible case @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_checkRetryErr && @@ -21681,7 +25130,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingPermCheckQ_D_OUT[8] && sq_respHandleSQ_pendingPermCheckQ_D_OUT[7:3] != 5'd0) begin - v__h109873 = $time; + v__h109853 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -21690,8 +25139,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingPermCheckQ_D_OUT[8] && sq_respHandleSQ_pendingPermCheckQ_D_OUT[7:3] != 5'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h109873, - "\"RespHandleSQ.bsv\", line 939, column 21\n", + v__h109853, + "\"RespHandleSQ.bsv\", line 943, column 21\n", "wcs assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_checkPerm4NormalReadAtomicResp && @@ -21882,7 +25331,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingDmaReqQ_D_OUT[78] && !sq_respHandleSQ_pendingDmaReqQ_D_OUT[76]) begin - v__h117067 = $time; + v__h117047 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -21890,8 +25339,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingDmaReqQ_D_OUT[78] && !sq_respHandleSQ_pendingDmaReqQ_D_OUT[76]) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h117067, - "\"RespHandleSQ.bsv\", line 1343, column 13\n", + v__h117047, + "\"RespHandleSQ.bsv\", line 1347, column 13\n", "hasLocalErr -> genWorkComp assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_issueDmaReq && @@ -22024,7 +25473,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingDmaReqQ_D_OUT[76] && !sq_respHandleSQ_pendingDmaReqQ_D_OUT[71]) begin - v__h117291 = $time; + v__h117271 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -22032,8 +25481,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingDmaReqQ_D_OUT[76] && !sq_respHandleSQ_pendingDmaReqQ_D_OUT[71]) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h117291, - "\"RespHandleSQ.bsv\", line 1352, column 13\n", + v__h117271, + "\"RespHandleSQ.bsv\", line 1356, column 13\n", "genWorkComp -> isValid(wcStatus) assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_issueDmaReq && @@ -22172,7 +25621,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingDmaReqQ_D_OUT[70:66] != 5'd0 && !sq_respHandleSQ_pendingDmaReqQ_D_OUT[76]) begin - v__h117643 = $time; + v__h117623 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -22181,8 +25630,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingDmaReqQ_D_OUT[70:66] != 5'd0 && !sq_respHandleSQ_pendingDmaReqQ_D_OUT[76]) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h117643, - "\"RespHandleSQ.bsv\", line 1380, column 17\n", + v__h117623, + "\"RespHandleSQ.bsv\", line 1384, column 17\n", "genWorkComp assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_issueDmaReq && @@ -22378,7 +25827,7 @@ module mkQP(CLK, sq_respHandleSQ_incomingRespQ_FULL_N && sq_pendingWorkReqBuf_emptyReg && _write_RL_sq_respHandleSQ_handleRespByType_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1452, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_discardGhostResp and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1456, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_discardGhostResp and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22389,7 +25838,7 @@ module mkQP(CLK, sq_respHandleSQ_incomingRespQ_FULL_N && sq_pendingWorkReqBuf_emptyReg && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1452, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_discardGhostResp and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1456, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_discardGhostResp and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22400,7 +25849,7 @@ module mkQP(CLK, sq_respHandleSQ_incomingRespQ_FULL_N && sq_pendingWorkReqBuf_emptyReg && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvRetryRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1452, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_discardGhostResp and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_retryFlushReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1456, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_discardGhostResp and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_retryFlushReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_checkTimeOutErr && WILL_FIRE_RL_sq_respHandleSQ_handleRespByType && @@ -22409,7 +25858,7 @@ module mkQP(CLK, sq_retryHandler_timeOutNotificationQ_EMPTY_N && !sq_respHandleSQ_errOccurredReg && _write_RL_sq_respHandleSQ_handleRespByType_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1498, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_checkTimeOutErr and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1502, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_checkTimeOutErr and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_checkTimeOutErr && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22418,7 +25867,7 @@ module mkQP(CLK, sq_retryHandler_timeOutNotificationQ_EMPTY_N && !sq_respHandleSQ_errOccurredReg && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1498, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_checkTimeOutErr and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1502, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_checkTimeOutErr and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_checkTimeOutErr && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22427,19 +25876,19 @@ module mkQP(CLK, sq_retryHandler_timeOutNotificationQ_EMPTY_N && !sq_respHandleSQ_recvErrRespReg && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvRetryRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1498, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_checkTimeOutErr and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_retryFlushReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1502, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_checkTimeOutErr and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_retryFlushReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp && WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp) - $display("Error: \"RespHandleSQ.bsv\", line 1587, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods first and deq\n of module instance respPktPipe_metaDataQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1591, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods first and deq\n of module instance respPktPipe_metaDataQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp && WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp) - $display("Error: \"RespHandleSQ.bsv\", line 1587, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods deq and deq\n of module instance respPktPipe_metaDataQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1591, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods deq and deq\n of module instance respPktPipe_metaDataQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp && WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp) - $display("Error: \"RespHandleSQ.bsv\", line 1587, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods enq and enq\n of module instance sq_respHandleSQ_incomingRespQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1591, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods enq and enq\n of module instance sq_respHandleSQ_incomingRespQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp && WILL_FIRE_RL_sq_respHandleSQ_handleRespByType && @@ -22449,7 +25898,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_emptyReg && respPktPipe_metaDataQ_EMPTY_N && _write_RL_sq_respHandleSQ_handleRespByType_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1587, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1591, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22459,45 +25908,45 @@ module mkQP(CLK, sq_pendingWorkReqBuf_emptyReg && respPktPipe_metaDataQ_EMPTY_N && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1587, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1591, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushIncomingResp and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp && respPktPipe_metaDataQ_EMPTY_N) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods first and\n deq of module instance respPktPipe_metaDataQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods first and\n deq of module instance respPktPipe_metaDataQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp && respPktPipe_metaDataQ_EMPTY_N) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods deq and\n deq of module instance respPktPipe_metaDataQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods deq and\n deq of module instance respPktPipe_metaDataQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods notEmpty\n and deq of module instance respPktPipe_metaDataQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods notEmpty\n and deq of module instance respPktPipe_metaDataQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp && respPktPipe_metaDataQ_EMPTY_N) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods enq and\n enq of module instance sq_respHandleSQ_incomingRespQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods enq and\n enq of module instance sq_respHandleSQ_incomingRespQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp && respPktPipe_metaDataQ_EMPTY_N) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods first and deq\n of module instance respPktPipe_metaDataQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods first and deq\n of module instance respPktPipe_metaDataQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp && respPktPipe_metaDataQ_EMPTY_N) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods deq and deq\n of module instance respPktPipe_metaDataQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods deq and deq\n of module instance respPktPipe_metaDataQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods notEmpty and\n deq of module instance respPktPipe_metaDataQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods notEmpty and\n deq of module instance respPktPipe_metaDataQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp && respPktPipe_metaDataQ_EMPTY_N) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods enq and enq\n of module instance sq_respHandleSQ_incomingRespQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods enq and enq\n of module instance sq_respHandleSQ_incomingRespQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_handleRespByType && @@ -22507,7 +25956,7 @@ module mkQP(CLK, (!respPktPipe_metaDataQ_EMPTY_N || sq_respHandleSQ_incomingRespQ_FULL_N) && _write_RL_sq_respHandleSQ_handleRespByType_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22517,7 +25966,7 @@ module mkQP(CLK, (!respPktPipe_metaDataQ_EMPTY_N || sq_respHandleSQ_incomingRespQ_FULL_N) && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22527,20 +25976,20 @@ module mkQP(CLK, sq_respHandleSQ_incomingRespQ_FULL_N) && !sq_respHandleSQ_recvErrRespReg && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvRetryRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1661, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_retryFlushReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1665, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_retryFlushReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushDone && sq_pendingWorkReqBuf_emptyReg) begin - v__h122840 = $time; + v__h122820 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushDone && sq_pendingWorkReqBuf_emptyReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h122840, - "\"RespHandleSQ.bsv\", line 1636, column 13\n", + v__h122820, + "\"RespHandleSQ.bsv\", line 1640, column 13\n", "pendingWR notEmpty assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushDone && @@ -22593,7 +26042,7 @@ module mkQP(CLK, sq_respHandleSQ_retryFlushReg && !sq_respHandleSQ_errOccurredReg && _write_RL_sq_respHandleSQ_handleRespByType_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1633, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushDone and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1637, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushDone and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushDone && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22601,7 +26050,7 @@ module mkQP(CLK, sq_respHandleSQ_retryFlushReg && !sq_respHandleSQ_errOccurredReg && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1633, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushDone and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1637, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushDone and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_retryFlushDone && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -22609,19 +26058,19 @@ module mkQP(CLK, !sq_respHandleSQ_recvErrRespReg && !sq_respHandleSQ_errOccurredReg && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvRetryRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1633, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushDone and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_retryFlushReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1637, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_retryFlushDone and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_retryFlushReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_retryHandler_startPreRetry && sq_retryHandler_retryReasonReg == 3'd0) begin - v__h36446 = $time; + v__h36384 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_retryHandler_startPreRetry && sq_retryHandler_retryReasonReg == 3'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h36446, + v__h36384, "\"RetryHandleSQ.bsv\", line 557, column 13\n", "retryReasonReg assertion @ mkRetryHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -22645,7 +26094,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStateReg != 2'd0 && sq_pendingWorkReqBuf_emptyReg) begin - v__h36711 = $time; + v__h36649 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -22653,7 +26102,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStateReg != 2'd0 && sq_pendingWorkReqBuf_emptyReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h36711, + v__h36649, "\"SpecialFIFOF.bsv\", line 482, column 17\n", "isEmpty assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -22677,7 +26126,7 @@ module mkQP(CLK, sq_retryHandler_retryWorkReqIdReg != SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1463) begin - v__h37491 = $time; + v__h37429 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -22686,7 +26135,7 @@ module mkQP(CLK, sq_retryHandler_retryWorkReqIdReg != SEL_ARR_sq_pendingWorkReqBuf_dataVec_0_59_BITS_ETC___d1463) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h37491, + v__h37429, "\"RetryHandleSQ.bsv\", line 646, column 17\n", "retryWorkReqIdReg assertion @ mkRetryHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -22707,23 +26156,23 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_retryHandler_checkPartialRetry && NOT_IF_sq_retryHandler_retryReasonReg_431_EQ_4_ETC___d1516) begin - v__h38910 = $time; + v__h38848 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_retryHandler_checkPartialRetry && NOT_IF_sq_retryHandler_retryReasonReg_431_EQ_4_ETC___d1516) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h38910, + v__h38848, "\"RetryHandleSQ.bsv\", line 659, column 13\n", "retryStartPSN assertion @ mkRetryHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_retryHandler_checkPartialRetry && NOT_IF_sq_retryHandler_retryReasonReg_431_EQ_4_ETC___d1516) $display("retryStartPSN=%h should between startPSN=%h and endPSN=%h inclusively", - v__h37423, - value__h99939, - value__h99966); + v__h37361, + value__h99877, + value__h99904); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_retryHandler_checkPartialRetry && NOT_IF_sq_retryHandler_retryReasonReg_431_EQ_4_ETC___d1516) @@ -22732,14 +26181,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_retryHandler_handleRetryCntUpdate && sq_retryHandler_retryCntrlStateReg_port1__read == 2'd1) begin - v__h35350 = $time; + v__h35288 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_retryHandler_handleRetryCntUpdate && sq_retryHandler_retryCntrlStateReg_port1__read == 2'd1) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h35350, + v__h35288, "\"RetryHandleSQ.bsv\", line 425, column 13\n", "hasRetryErr assertion @ mkRetryHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -22785,7 +26234,7 @@ module mkQP(CLK, sq_retryHandler_updateRetryCntQ_D_OUT[2:0] != 3'd4 && sq_retryHandler_updateRetryCntQ_D_OUT[2:0] != 3'd1) begin - v__h35692 = $time; + v__h35630 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -22796,7 +26245,7 @@ module mkQP(CLK, sq_retryHandler_updateRetryCntQ_D_OUT[2:0] != 3'd4 && sq_retryHandler_updateRetryCntQ_D_OUT[2:0] != 3'd1) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h35692, + v__h35630, "\"RetryHandleSQ.bsv\", line 168, column 25\n", "unreachible case in decRetryCntByReason() @ mkRetryHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -22838,7 +26287,7 @@ module mkQP(CLK, sq_retryHandler_updateRetryCntQ_D_OUT[3] && sq_pendingWorkReqBuf_emptyReg) begin - v__h35995 = $time; + v__h35933 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -22846,7 +26295,7 @@ module mkQP(CLK, sq_retryHandler_updateRetryCntQ_D_OUT[3] && sq_pendingWorkReqBuf_emptyReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h35995, + v__h35933, "\"RetryHandleSQ.bsv\", line 455, column 17\n", "pendingWorkReqNotEmpty assertion @ mkRetryHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -22912,7 +26361,7 @@ module mkQP(CLK, sq_retryHandler_retryActionQ_D_OUT[97] && sq_pendingWorkReqBuf_emptyReg) begin - v__h34459 = $time; + v__h34397 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -22920,7 +26369,7 @@ module mkQP(CLK, sq_retryHandler_retryActionQ_D_OUT[97] && sq_pendingWorkReqBuf_emptyReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h34459, + v__h34397, "\"RetryHandleSQ.bsv\", line 380, column 17\n", "pendingWorkReqNotEmpty assertion @ mkRetryHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -22954,7 +26403,7 @@ module mkQP(CLK, sq_retryHandler_retryActionQ_D_OUT[8:6] == 3'd1 && !sq_retryHandler_retryActionQ_D_OUT[5]) begin - v__h34954 = $time; + v__h34892 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -22963,7 +26412,7 @@ module mkQP(CLK, sq_retryHandler_retryActionQ_D_OUT[8:6] == 3'd1 && !sq_retryHandler_retryActionQ_D_OUT[5]) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h34954, + v__h34892, "\"RetryHandleSQ.bsv\", line 396, column 25\n", "retryRnrTimer assertion @ mkRetryHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -23023,7 +26472,7 @@ module mkQP(CLK, (sq_pendingWorkReqBuf_scanStartReg_port1__read || sq_pendingWorkReqBuf_preScanRestartReg_port1__read)) begin - v__h98868 = $time; + v__h98806 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -23032,7 +26481,7 @@ module mkQP(CLK, (sq_pendingWorkReqBuf_scanStartReg_port1__read || sq_pendingWorkReqBuf_preScanRestartReg_port1__read)) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h98868, + v__h98806, "\"SpecialFIFOF.bsv\", line 434, column 17\n", "dequeue assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -23080,7 +26529,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg) begin - v__h99106 = $time; + v__h99044 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -23088,7 +26537,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h99106, + v__h99044, "\"RespHandleSQ.bsv\", line 521, column 17\n", "deqPendingWorkReq assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -23486,78 +26935,78 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg) - $display("FlagsType { flags: ", enumBits__h93928, " = "); + $display("FlagsType { flags: ", enumBits__h93866, " = "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - enumBits__h93928[0]) + enumBits__h93866[0]) $display("IBV_SEND_FENCE", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - !enumBits__h93928[0]) + !enumBits__h93866[0]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - enumBits__h93928[1]) + enumBits__h93866[1]) $display("IBV_SEND_SIGNALED", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - !enumBits__h93928[1]) + !enumBits__h93866[1]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - enumBits__h93928[2]) + enumBits__h93866[2]) $display("IBV_SEND_SOLICITED", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - !enumBits__h93928[2]) + !enumBits__h93866[2]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - enumBits__h93928[3]) + enumBits__h93866[3]) $display("IBV_SEND_INLINE", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - !enumBits__h93928[3]) + !enumBits__h93866[3]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - enumBits__h93928[4]) + enumBits__h93866[4]) $display("IBV_SEND_IP_CSUM", " | "); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - !enumBits__h93928[4]) + !enumBits__h93866[4]) $display(""); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - enumBits__h93928 == 5'd0) + enumBits__h93866 == 5'd0) $display("IBV_SEND_NO_FLAGS", " }"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && - enumBits__h93928 != 5'd0) + enumBits__h93866 != 5'd0) $display("}"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && @@ -23599,7 +27048,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4003) - $display("tagged Valid ", "'h%h", value__h99740); + $display("tagged Valid ", "'h%h", value__h99678); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -23616,7 +27065,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4012) - $display("tagged Valid ", "'h%h", value__h99767); + $display("tagged Valid ", "'h%h", value__h99705); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -23633,7 +27082,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4021) - $display("tagged Valid ", "'h%h", value__h99797); + $display("tagged Valid ", "'h%h", value__h99735); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -23650,7 +27099,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4030) - $display("tagged Valid ", "'h%h", value__h99824); + $display("tagged Valid ", "'h%h", value__h99762); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -23667,7 +27116,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4039) - $display("tagged Valid ", "'h%h", value__h99854); + $display("tagged Valid ", "'h%h", value__h99792); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -23684,7 +27133,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4048) - $display("tagged Valid ", "'h%h", value__h99881); + $display("tagged Valid ", "'h%h", value__h99819); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -23701,7 +27150,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d4057) - $display("tagged Valid ", "'h%h", value__h99908); + $display("tagged Valid ", "'h%h", value__h99846); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -23723,7 +27172,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1473) - $display("tagged Valid ", "'h%h", value__h99939); + $display("tagged Valid ", "'h%h", value__h99877); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -23740,7 +27189,7 @@ module mkQP(CLK, NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && !sq_respHandleSQ_preStageDeqPendingWorkReqReg && !SEL_ARR_NOT_sq_pendingWorkReqBuf_dataVec_0_59__ETC___d1491) - $display("tagged Valid ", "'h%h", value__h99966); + $display("tagged Valid ", "'h%h", value__h99904); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq && NOT_sq_respHandleSQ_preStageWorkReqAckTypeReg__ETC___d4352 && @@ -24006,7 +27455,7 @@ module mkQP(CLK, (sq_pendingWorkReqBuf_scanStartReg_port1__read || sq_pendingWorkReqBuf_preScanRestartReg_port1__read)) begin - v__h120515 = $time; + v__h120495 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24014,7 +27463,7 @@ module mkQP(CLK, (sq_pendingWorkReqBuf_scanStartReg_port1__read || sq_pendingWorkReqBuf_preScanRestartReg_port1__read)) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h120515, + v__h120495, "\"SpecialFIFOF.bsv\", line 434, column 17\n", "dequeue assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24054,20 +27503,20 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_respHandleSQ_errFlushWorkReq && WILL_FIRE_RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload && respPktPipe_metaDataQ_EMPTY_N) - $display("Error: \"RespHandleSQ.bsv\", line 1534, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload called conflicting\n methods enq and enq of module instance sq_respHandleSQ_incomingRespQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1538, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_retryFlushPktMetaDataAndPayload called conflicting\n methods enq and enq of module instance sq_respHandleSQ_incomingRespQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushWorkReq && WILL_FIRE_RL_sq_respHandleSQ_errFlushIncomingResp) - $display("Error: \"RespHandleSQ.bsv\", line 1534, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods enq and\n enq of module instance sq_respHandleSQ_incomingRespQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1538, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_errFlushIncomingResp called conflicting methods enq and\n enq of module instance sq_respHandleSQ_incomingRespQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushWorkReq && WILL_FIRE_RL_sq_respHandleSQ_checkTimeOutErr && sq_retryHandler_timeOutNotificationQ_D_OUT) - $display("Error: \"RespHandleSQ.bsv\", line 1534, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_checkTimeOutErr called conflicting methods port0__read\n and port0__write of module instance sq_respHandleSQ_hasTimeOutErrReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1538, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_checkTimeOutErr called conflicting methods port0__read\n and port0__write of module instance sq_respHandleSQ_hasTimeOutErrReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushWorkReq && WILL_FIRE_RL_sq_respHandleSQ_discardGhostResp) - $display("Error: \"RespHandleSQ.bsv\", line 1534, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods enq and enq\n of module instance sq_respHandleSQ_incomingRespQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1538, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_discardGhostResp called conflicting methods enq and enq\n of module instance sq_respHandleSQ_incomingRespQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushWorkReq && WILL_FIRE_RL_sq_respHandleSQ_handleRespByType && @@ -24078,7 +27527,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStateReg == 2'd2) && sq_respHandleSQ_incomingRespQ_FULL_N && _write_RL_sq_respHandleSQ_handleRespByType_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1534, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1538, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_handleRespByType called conflicting methods read and\n write of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushWorkReq && WILL_FIRE_RL_sq_respHandleSQ_recvRespHeader && @@ -24089,17 +27538,17 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStateReg == 2'd2) && sq_respHandleSQ_incomingRespQ_FULL_N && _write_RL_sq_respHandleSQ_recvRespHeader_EN_sq_respHandleSQ_recvErrRespReg_wget) - $display("Error: \"RespHandleSQ.bsv\", line 1534, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1538, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_recvRespHeader called conflicting methods read and write\n of module instance sq_respHandleSQ_recvErrRespReg.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_errFlushWorkReq && WILL_FIRE_RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq) - $display("Error: \"RespHandleSQ.bsv\", line 1534, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq called conflicting methods enq\n and enq of module instance sq_respHandleSQ_incomingRespQ.\n"); + $display("Error: \"RespHandleSQ.bsv\", line 1538, column 10: (R0002)\n Conflict-free rules RL_sq_respHandleSQ_errFlushWorkReq and\n RL_sq_respHandleSQ_deqPktMetaDataOrWorkReq called conflicting methods enq\n and enq of module instance sq_respHandleSQ_incomingRespQ.\n"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_pendingWorkReqBuf_check && sq_pendingWorkReqBuf_scanStartReg_port1__read && sq_pendingWorkReqBuf_popReg_port1__read) begin - v__h29295 = $time; + v__h29233 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24107,7 +27556,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStartReg_port1__read && sq_pendingWorkReqBuf_popReg_port1__read) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h29295, + v__h29233, "\"SpecialFIFOF.bsv\", line 301, column 13\n", "scanStartReg and popReg assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24145,7 +27594,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_preScanRestartReg_port1__read && sq_pendingWorkReqBuf_popReg_port1__read) begin - v__h29442 = $time; + v__h29380 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24153,7 +27602,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_preScanRestartReg_port1__read && sq_pendingWorkReqBuf_popReg_port1__read) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h29442, + v__h29380, "\"SpecialFIFOF.bsv\", line 310, column 13\n", "preScanRestartReg and popReg assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24192,7 +27641,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStateReg == 2'd1) && sq_pendingWorkReqBuf_itemCnt_Q_OUT == 3'd0) begin - v__h29608 = $time; + v__h29546 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24201,7 +27650,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStateReg == 2'd1) && sq_pendingWorkReqBuf_itemCnt_Q_OUT == 3'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h29608, + v__h29546, "\"SpecialFIFOF.bsv\", line 321, column 17\n", "notEmpty assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24231,7 +27680,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_emptyReg && sq_pendingWorkReqBuf_itemCnt_Q_OUT != 3'd0) begin - v__h29763 = $time; + v__h29701 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24239,7 +27688,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_emptyReg && sq_pendingWorkReqBuf_itemCnt_Q_OUT != 3'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h29763, + v__h29701, "\"SpecialFIFOF.bsv\", line 333, column 17\n", "isEmpty assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24260,7 +27709,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_fullReg && sq_pendingWorkReqBuf_itemCnt_Q_OUT != 3'd4) begin - v__h29891 = $time; + v__h29829 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24269,7 +27718,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_fullReg && sq_pendingWorkReqBuf_itemCnt_Q_OUT != 3'd4) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h29891, + v__h29829, "\"SpecialFIFOF.bsv\", line 343, column 17\n", "isFull assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24293,7 +27742,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_popReg_port1__read && sq_pendingWorkReqBuf_deqPtrReg_90_EQ_sq_pendin_ETC___d1031) begin - v__h30076 = $time; + v__h30014 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24302,7 +27751,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_popReg_port1__read && sq_pendingWorkReqBuf_deqPtrReg_90_EQ_sq_pendin_ETC___d1031) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h30076, + v__h30014, "\"SpecialFIFOF.bsv\", line 357, column 21\n", "dequeue beyond scan assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24517,7 +27966,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStopReg_port1__read && sq_pendingWorkReqBuf_preScanRestartReg_port1__read) begin - v__h30289 = $time; + v__h30227 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24526,7 +27975,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStopReg_port1__read && sq_pendingWorkReqBuf_preScanRestartReg_port1__read) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h30289, + v__h30227, "\"SpecialFIFOF.bsv\", line 375, column 17\n", "scanStopReg and preScanRestartReg assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24570,7 +28019,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStateReg == 2'd1 && sq_pendingWorkReqBuf_popReg_port1__read) begin - v__h30463 = $time; + v__h30401 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24578,7 +28027,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_scanStateReg == 2'd1 && sq_pendingWorkReqBuf_popReg_port1__read) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h30463, + v__h30401, "\"SpecialFIFOF.bsv\", line 396, column 17\n", "no pop when inPreScanMode assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24612,7 +28061,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_itemCnt_Q_OUT < sq_pendingWorkReqBuf_scanCnt_Q_OUT)) begin - v__h30613 = $time; + v__h30551 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24621,7 +28070,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_itemCnt_Q_OUT < sq_pendingWorkReqBuf_scanCnt_Q_OUT)) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h30613, + v__h30551, "\"SpecialFIFOF.bsv\", line 406, column 13\n", "itemCnt >= scanCnt assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24646,7 +28095,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_preScanStartReg_port1__read && sq_pendingWorkReqBuf_emptyReg) begin - v__h24390 = $time; + v__h24328 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24654,7 +28103,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_preScanStartReg_port1__read && sq_pendingWorkReqBuf_emptyReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h24390, + v__h24328, "\"SpecialFIFOF.bsv\", line 175, column 17\n", "isEmpty assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24677,7 +28126,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_preScanStartReg_port1__read && sq_pendingWorkReqBuf_popReg_port1__read) begin - v__h24503 = $time; + v__h24441 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24685,7 +28134,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_preScanStartReg_port1__read && sq_pendingWorkReqBuf_popReg_port1__read) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h24503, + v__h24441, "\"SpecialFIFOF.bsv\", line 180, column 17\n", "no pop when startPreScan assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24717,14 +28166,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_pendingWorkReqBuf_preScanMode && sq_pendingWorkReqBuf_emptyReg) begin - v__h24769 = $time; + v__h24707 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_pendingWorkReqBuf_preScanMode && sq_pendingWorkReqBuf_emptyReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h24769, + v__h24707, "\"SpecialFIFOF.bsv\", line 202, column 13\n", "isEmpty assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24747,14 +28196,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_pendingWorkReqBuf_preScanMode && sq_pendingWorkReqBuf_popReg_port1__read) begin - v__h24880 = $time; + v__h24818 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_pendingWorkReqBuf_preScanMode && sq_pendingWorkReqBuf_popReg_port1__read) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h24880, + v__h24818, "\"SpecialFIFOF.bsv\", line 210, column 13\n", "no pop when inPreScanMode assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24787,14 +28236,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_pendingWorkReqBuf_scanModeStateChange && sq_pendingWorkReqBuf_emptyReg) begin - v__h25249 = $time; + v__h25187 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_pendingWorkReqBuf_scanModeStateChange && sq_pendingWorkReqBuf_emptyReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h25249, + v__h25187, "\"SpecialFIFOF.bsv\", line 234, column 13\n", "isEmpty assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24815,7 +28264,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_preScanRestartReg_port1__read && sq_pendingWorkReqBuf_popReg_port1__read) begin - v__h25475 = $time; + v__h25413 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24824,7 +28273,7 @@ module mkQP(CLK, sq_pendingWorkReqBuf_preScanRestartReg_port1__read && sq_pendingWorkReqBuf_popReg_port1__read) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h25475, + v__h25413, "\"SpecialFIFOF.bsv\", line 249, column 17\n", "no pop when preScanRestart assertion @ mkScanFIFOF"); if (RST_N != `BSV_RESET_VALUE) @@ -24861,14 +28310,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_newPendingWorkReqPiptOut_decrPendingNewWorkReqCnt && sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg == 8'd0) begin - v__h43204 = $time; + v__h43142 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_newPendingWorkReqPiptOut_decrPendingNewWorkReqCnt && sq_newPendingWorkReqPiptOut_pendingNewWorkReqCnt_cntReg == 8'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h43204, + v__h43142, "\"QueuePair.bsv\", line 123, column 13\n", "decrPendingNewWorkReqCnt assertion @ mkNewPendingWorkReqPipeOut"); if (RST_N != `BSV_RESET_VALUE) @@ -24884,7 +28333,7 @@ module mkQP(CLK, sq_respHandleSQ_pendingWorkCompQ_D_OUT[635] && !sq_respHandleSQ_pendingWorkCompQ_D_OUT[633]) begin - v__h118758 = $time; + v__h118738 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24892,8 +28341,8 @@ module mkQP(CLK, sq_respHandleSQ_pendingWorkCompQ_D_OUT[635] && !sq_respHandleSQ_pendingWorkCompQ_D_OUT[633]) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h118758, - "\"RespHandleSQ.bsv\", line 1421, column 13\n", + v__h118738, + "\"RespHandleSQ.bsv\", line 1425, column 13\n", "hasLocalErr -> genWorkComp assertion @ mkRespHandleSQ"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_respHandleSQ_genWorkCompSQ && @@ -24934,7 +28383,7 @@ module mkQP(CLK, sq_workCompGenSQ_pendingWorkCompQ4SQ_D_OUT[568:565] != 4'd9 && sq_workCompGenSQ_pendingWorkCompQ4SQ_D_OUT[568:565] != 4'd10) begin - v__h126312 = $time; + v__h126292 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -24951,7 +28400,7 @@ module mkQP(CLK, sq_workCompGenSQ_pendingWorkCompQ4SQ_D_OUT[568:565] != 4'd9 && sq_workCompGenSQ_pendingWorkCompQ4SQ_D_OUT[568:565] != 4'd10) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h126312, + v__h126292, "\"WorkCompGen.bsv\", line 180, column 13\n", "maybeWorkComp assertion @ mkWorkCompGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -25279,13 +28728,13 @@ module mkQP(CLK, if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onCreate && cntrl_reqQ_D_OUT[300:299] == 2'd1) begin - v__h3196 = $time; + v__h3134 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_cntrl_onCreate && cntrl_reqQ_D_OUT[300:299] == 2'd1) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h3196, + v__h3134, "\"Controller.bsv\", line 452, column 21\n", "no QP destroy on create @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -25302,7 +28751,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) begin - v__h3517 = $time; + v__h3455 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -25310,7 +28759,7 @@ module mkQP(CLK, cntrl_reqQ_D_OUT[300:299] != 2'd2 && cntrl_reqQ_D_OUT[300:299] != 2'd3) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h3517, + v__h3455, "\"Controller.bsv\", line 476, column 21\n", "unreachible case @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) @@ -25350,14 +28799,14 @@ module mkQP(CLK, if (WILL_FIRE_RL_sq_workCompGenSQ_errFlushSQ && sq_workCompGenSQ_genWorkCompQ_D_OUT[254:253] != 2'd0) begin - v__h129863 = $time; + v__h129843 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_sq_workCompGenSQ_errFlushSQ && sq_workCompGenSQ_genWorkCompQ_D_OUT[254:253] != 2'd0) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h129863, + v__h129843, "\"WorkCompGen.bsv\", line 307, column 13\n", "wcGenReqSQ.wcReqType assertion @ mkWorkCompGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -25392,7 +28841,7 @@ module mkQP(CLK, sq_workCompGenSQ_genWorkCompQ_D_OUT[856:793] != sq_workCompGenSQ_firstErrPartialAckWorkReqIdReg) begin - v__h130013 = $time; + v__h129993 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) @@ -25401,7 +28850,7 @@ module mkQP(CLK, sq_workCompGenSQ_genWorkCompQ_D_OUT[856:793] != sq_workCompGenSQ_firstErrPartialAckWorkReqIdReg) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h130013, + v__h129993, "\"WorkCompGen.bsv\", line 322, column 17\n", "wcGenReqSQ.wr.id assertion @ mkWorkCompGenSQ"); if (RST_N != `BSV_RESET_VALUE) @@ -25429,14 +28878,14 @@ module mkQP(CLK, if (cntrl_setStateErrReg_port1__read && (cntrl_stateReg == 4'd7 || cntrl_stateReg == 4'd0)) begin - v__h7672 = $time; + v__h7610 = $time; #0; end if (RST_N != `BSV_RESET_VALUE) if (cntrl_setStateErrReg_port1__read && (cntrl_stateReg == 4'd7 || cntrl_stateReg == 4'd0)) $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h7672, + v__h7610, "\"Controller.bsv\", line 872, column 17\n", "set state error assertion @ mkCntrlQP"); if (RST_N != `BSV_RESET_VALUE) diff --git a/ethernet/RoCEv2/blue-rdma/mkTransportLayer.v b/ethernet/RoCEv2/blue-rdma/mkTransportLayer.v index 6807e7c125..ef9fdc12cc 100644 --- a/ethernet/RoCEv2/blue-rdma/mkTransportLayer.v +++ b/ethernet/RoCEv2/blue-rdma/mkTransportLayer.v @@ -1,23 +1,381 @@ -/* - * ------------------------------------------------------------------- - * This Verilog file has been automatically generated from a core originally written - * in Bluespec SystemVerilog (BSV). The original source code can be found at: - * - * Repository: https://github.com/datenlord/blue-rdma - * Author: DatenLord (https://datenlord.github.io/) - * - * Modifications have been made to the original core before compiling the Verilog. - * For any questions or further information regarding the modifications, please - * feel free to contact me. - * - * Modifications by: Filippo Marini - * Email: filippo.marini@pd.infn.it - * ------------------------------------------------------------------- - */ // -// Generated by Bluespec Compiler, version 2023.01 (build 52adafa) +// Generated by Bluespec Compiler, version 2023.01 (build 52adafa5) +// +// On Mon Apr 13 13:07:37 CEST 2026 +// +// Method conflict info: +// Method: workReqInput_put +// Conflict-free: rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Conflicts: workReqInput_put +// +// Method: rdmaDataStreamInput_put +// Conflict-free: workReqInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Conflicts: rdmaDataStreamInput_put +// +// Method: rdmaDataStreamPipeOut_first +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Sequenced before: rdmaDataStreamPipeOut_deq +// +// Method: rdmaDataStreamPipeOut_deq +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Sequenced after: rdmaDataStreamPipeOut_first, rdmaDataStreamPipeOut_notEmpty +// Conflicts: rdmaDataStreamPipeOut_deq +// +// Method: rdmaDataStreamPipeOut_notEmpty +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Sequenced before: rdmaDataStreamPipeOut_deq +// +// Method: workCompPipeOutSQ_first +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Sequenced before: workCompPipeOutSQ_deq +// +// Method: workCompPipeOutSQ_deq +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Sequenced after: workCompPipeOutSQ_first, workCompPipeOutSQ_notEmpty +// Conflicts: workCompPipeOutSQ_deq +// +// Method: workCompPipeOutSQ_notEmpty +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Sequenced before: workCompPipeOutSQ_deq +// +// Method: srvPortMetaData_request_put +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Conflicts: srvPortMetaData_request_put +// +// Method: srvPortMetaData_response_get +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// Conflicts: srvPortMetaData_response_get +// +// Method: dmaReadClt_request_get +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_response_put, +// cnpReceived +// Conflicts: dmaReadClt_request_get +// +// Method: dmaReadClt_response_put +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// cnpReceived +// Conflicts: dmaReadClt_response_put +// +// Method: cnpReceived +// Conflict-free: workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived +// +// BVI format method schedule info: +// schedule workReqInput_put CF ( rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule workReqInput_put C ( workReqInput_put ); +// +// schedule rdmaDataStreamInput_put CF ( workReqInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule rdmaDataStreamInput_put C ( rdmaDataStreamInput_put ); +// +// schedule rdmaDataStreamPipeOut_first CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule rdmaDataStreamPipeOut_first SB ( rdmaDataStreamPipeOut_deq ); +// +// schedule rdmaDataStreamPipeOut_deq CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule rdmaDataStreamPipeOut_deq C ( rdmaDataStreamPipeOut_deq ); +// +// schedule rdmaDataStreamPipeOut_notEmpty CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule rdmaDataStreamPipeOut_notEmpty SB ( rdmaDataStreamPipeOut_deq ); +// +// schedule workCompPipeOutSQ_first CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule workCompPipeOutSQ_first SB ( workCompPipeOutSQ_deq ); +// +// schedule workCompPipeOutSQ_deq CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule workCompPipeOutSQ_deq C ( workCompPipeOutSQ_deq ); +// +// schedule workCompPipeOutSQ_notEmpty CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule workCompPipeOutSQ_notEmpty SB ( workCompPipeOutSQ_deq ); +// +// schedule srvPortMetaData_request_put CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule srvPortMetaData_request_put C ( srvPortMetaData_request_put ); +// +// schedule srvPortMetaData_response_get CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule srvPortMetaData_response_get C ( srvPortMetaData_response_get ); +// +// schedule dmaReadClt_request_get CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_response_put, +// cnpReceived ); +// schedule dmaReadClt_request_get C ( dmaReadClt_request_get ); +// +// schedule dmaReadClt_response_put CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// cnpReceived ); +// schedule dmaReadClt_response_put C ( dmaReadClt_response_put ); +// +// schedule cnpReceived CF ( workReqInput_put, +// rdmaDataStreamInput_put, +// rdmaDataStreamPipeOut_first, +// rdmaDataStreamPipeOut_deq, +// rdmaDataStreamPipeOut_notEmpty, +// workCompPipeOutSQ_first, +// workCompPipeOutSQ_deq, +// workCompPipeOutSQ_notEmpty, +// srvPortMetaData_request_put, +// srvPortMetaData_response_get, +// dmaReadClt_request_get, +// dmaReadClt_response_put, +// cnpReceived ); // -// On Wed Sep 11 15:19:55 CEST 2024 // // Ports: // Name I/O size props @@ -39,6 +397,7 @@ // dmaReadClt_request_get O 170 reg // RDY_dmaReadClt_request_get O 1 reg // RDY_dmaReadClt_response_put O 1 reg +// cnpReceived O 1 reg // CLK I 1 clock // RST_N I 1 reset // workReqInput_put I 601 reg @@ -114,7 +473,9 @@ module mkTransportLayer(CLK, dmaReadClt_response_put, EN_dmaReadClt_response_put, - RDY_dmaReadClt_response_put); + RDY_dmaReadClt_response_put, + + cnpReceived); input CLK; input RST_N; @@ -172,6 +533,9 @@ module mkTransportLayer(CLK, input EN_dmaReadClt_response_put; output RDY_dmaReadClt_response_put; + // value method cnpReceived + output cnpReceived; + // signals for module outputs wire [289 : 0] rdmaDataStreamPipeOut_first; wire [275 : 0] srvPortMetaData_response_get; @@ -189,6 +553,7 @@ module mkTransportLayer(CLK, RDY_workCompPipeOutSQ_first, RDY_workCompPipeOutSQ_notEmpty, RDY_workReqInput_put, + cnpReceived, rdmaDataStreamPipeOut_notEmpty, workCompPipeOutSQ_notEmpty; @@ -467,6 +832,8 @@ module mkTransportLayer(CLK, _write_RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt_EN_pktMetaDataAndPayloadPipeOutVec_isValidPktReg_whas, _write_RL_pktMetaDataAndPayloadPipeOutVec_preCheckHeader_EN_pktMetaDataAndPayloadPipeOutVec_pktBufStateReg_wget, _write_RL_pktMetaDataAndPayloadPipeOutVec_preCheckHeader_EN_pktMetaDataAndPayloadPipeOutVec_pktBufStateReg_whas, + cnpPulseVec_0_1_wget, + cnpPulseVec_0_1_whas, headerAndMetaDataAndPayloadPipeOut_headerMetaDataPipeOutVec_v_taken_signal_0_rv_EN_port0__write, headerAndMetaDataAndPayloadPipeOut_headerMetaDataPipeOutVec_v_taken_signal_0_rv_EN_port1__write, headerAndMetaDataAndPayloadPipeOut_headerMetaDataPipeOutVec_v_taken_signal_0_rv_EN_port2__write, @@ -558,6 +925,10 @@ module mkTransportLayer(CLK, wire arbitratedDmaReadClt_arbitratedClient_shouldSaveGrantIdxReg_D_IN, arbitratedDmaReadClt_arbitratedClient_shouldSaveGrantIdxReg_EN; + // register cnpPulseVec_0 + reg cnpPulseVec_0; + wire cnpPulseVec_0_D_IN, cnpPulseVec_0_EN; + // register headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_curDataStreamReg reg [289 : 0] headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_curDataStreamReg; wire [289 : 0] headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_curDataStreamReg_D_IN; @@ -1278,12 +1649,13 @@ module mkTransportLayer(CLK, workReqPipeOutVec_workReqOutVec_0_FULL_N; // rule scheduling signals - wire CAN_FIRE_RL_addNoErrWorkCompOutRule_0_checkEmptyPipeIn, - CAN_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_dispatchResponse, + wire CAN_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_dispatchResponse, CAN_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_extractReq, CAN_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_issueArbitratedReq, CAN_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_leafArbiterVec_binaryArbiter_0_binaryArbitrate, + CAN_FIRE_RL_cnpPulseVec_0__dreg_update, CAN_FIRE_RL_dataStreamPipeOut_leafArbiterVec_binaryArbiter_0_binaryArbitrate, + CAN_FIRE_RL_drainCnpAndSignal, CAN_FIRE_RL_headerAndMetaDataAndPayloadPipeOut_extractHeader, CAN_FIRE_RL_headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_extraLastFrag, CAN_FIRE_RL_headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_outputData, @@ -1339,12 +1711,13 @@ module mkTransportLayer(CLK, CAN_FIRE_srvPortMetaData_response_get, CAN_FIRE_workCompPipeOutSQ_deq, CAN_FIRE_workReqInput_put, - WILL_FIRE_RL_addNoErrWorkCompOutRule_0_checkEmptyPipeIn, WILL_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_dispatchResponse, WILL_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_extractReq, WILL_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_issueArbitratedReq, WILL_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_leafArbiterVec_binaryArbiter_0_binaryArbitrate, + WILL_FIRE_RL_cnpPulseVec_0__dreg_update, WILL_FIRE_RL_dataStreamPipeOut_leafArbiterVec_binaryArbiter_0_binaryArbitrate, + WILL_FIRE_RL_drainCnpAndSignal, WILL_FIRE_RL_headerAndMetaDataAndPayloadPipeOut_extractHeader, WILL_FIRE_RL_headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_extraLastFrag, WILL_FIRE_RL_headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_outputData, @@ -1457,12 +1830,10 @@ module mkTransportLayer(CLK, reg [63 : 0] v__h31150; reg [63 : 0] v__h8367; reg [63 : 0] v__h36179; - reg [63 : 0] v__h38749; reg [63 : 0] v__h26277; reg [63 : 0] v__h29124; reg [63 : 0] v__h29221; reg [63 : 0] v__h29617; - reg [63 : 0] v__h40540; // synopsys translate_on // remaining internal signals @@ -1525,7 +1896,7 @@ module mkTransportLayer(CLK, pktLen__h37192, x__h38061, y__h38112; - wire [7 : 0] pktFragNum__h37125, pktMetaData_pktFragNum__h38817; + wire [7 : 0] pktFragNum__h37125, pktMetaData_pktFragNum__h38757; wire [6 : 0] _theResult___headerMetaData_headerLen__h26602; wire [5 : 0] fragValidByteNum__h26706, headerLastFragInvalidByteNum__h17427, @@ -1643,6 +2014,9 @@ module mkTransportLayer(CLK, arbitratedDmaReadClt_arbitratedClient_respQ_FULL_N ; assign WILL_FIRE_dmaReadClt_response_put = EN_dmaReadClt_response_put ; + // value method cnpReceived + assign cnpReceived = cnpPulseVec_0 ; + // submodule arbitratedDmaReadClt_arbitratedClient_inputReqWithIdxVec_0 FIFO2 #(.width(32'd170), .guarded(1'd1)) arbitratedDmaReadClt_arbitratedClient_inputReqWithIdxVec_0(.RST(RST_N), @@ -2316,6 +2690,12 @@ module mkTransportLayer(CLK, assign WILL_FIRE_RL_mkConnectionGetPut_2 = CAN_FIRE_RL_mkConnectionGetPut_2 ; + // rule RL_drainCnpAndSignal + assign CAN_FIRE_RL_drainCnpAndSignal = + pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N ; + assign WILL_FIRE_RL_drainCnpAndSignal = + pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N ; + // rule RL_pdMetaData_pdTagVec_recvReq assign CAN_FIRE_RL_pdMetaData_pdTagVec_recvReq = pdMetaData_pdTagVec_reqQ_EMPTY_N && @@ -2561,6 +2941,16 @@ module mkTransportLayer(CLK, assign WILL_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_checkMetaDataQP = CAN_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_checkMetaDataQP ; + // rule RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt + assign CAN_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt = + pktMetaDataAndPayloadPipeOutVec_payloadFilterQ_EMPTY_N && + (!pktMetaDataAndPayloadPipeOutVec_payloadFilterQ_D_OUT[1] || + pktMetaDataAndPayloadPipeOutVec_rdmaHeaderFilt_ETC___d1910) && + (pktMetaDataAndPayloadPipeOutVec_payloadFilterQ_ETC___d1918 || + pktMetaDataAndPayloadPipeOutVec_payloadFragLenCalcQ_FULL_N) ; + assign WILL_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt = + CAN_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt ; + // rule RL_pktMetaDataAndPayloadPipeOutVec_calcFraglen assign CAN_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_calcFraglen = pktMetaDataAndPayloadPipeOutVec_payloadFragLenCalcQ_EMPTY_N && @@ -2647,19 +3037,9 @@ module mkTransportLayer(CLK, assign WILL_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPipeOut_accumulate = CAN_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPipeOut_accumulate ; - // rule RL_addNoErrWorkCompOutRule_0_checkEmptyPipeIn - assign CAN_FIRE_RL_addNoErrWorkCompOutRule_0_checkEmptyPipeIn = 1'd1 ; - assign WILL_FIRE_RL_addNoErrWorkCompOutRule_0_checkEmptyPipeIn = 1'd1 ; - - // rule RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt - assign CAN_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt = - pktMetaDataAndPayloadPipeOutVec_payloadFilterQ_EMPTY_N && - (!pktMetaDataAndPayloadPipeOutVec_payloadFilterQ_D_OUT[1] || - pktMetaDataAndPayloadPipeOutVec_rdmaHeaderFilt_ETC___d1910) && - (pktMetaDataAndPayloadPipeOutVec_payloadFilterQ_ETC___d1918 || - pktMetaDataAndPayloadPipeOutVec_payloadFragLenCalcQ_FULL_N) ; - assign WILL_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt = - CAN_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_discardInvalidHeaderPkt ; + // rule RL_cnpPulseVec_0__dreg_update + assign CAN_FIRE_RL_cnpPulseVec_0__dreg_update = 1'd1 ; + assign WILL_FIRE_RL_cnpPulseVec_0__dreg_update = 1'd1 ; // rule RL_arbitratedDmaReadClt_arbitratedClient_issueArbitratedReq assign CAN_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_issueArbitratedReq = @@ -2883,6 +3263,9 @@ module mkTransportLayer(CLK, qpMetaData_qpTagVec_reqQ_D_OUT[32] ? 2'd1 : 2'd2 ; // inlined wires + assign cnpPulseVec_0_1_wget = 1'd1 ; + assign cnpPulseVec_0_1_whas = + pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N ; assign _enq_RL_pktMetaDataAndPayloadPipeOutVec_recvPktFrag_EN_pktMetaDataAndPayloadPipeOutVec_rdmaHeaderRecvQ_wget = pktMetaDataAndPayloadPipeOutVec_payloadPipeIn_fifof_rv[1] ; assign _enq_RL_pktMetaDataAndPayloadPipeOutVec_recvPktFrag_EN_pktMetaDataAndPayloadPipeOutVec_rdmaHeaderRecvQ_whas = @@ -3851,6 +4234,11 @@ module mkTransportLayer(CLK, assign arbitratedDmaReadClt_arbitratedClient_shouldSaveGrantIdxReg_EN = CAN_FIRE_RL_arbitratedDmaReadClt_arbitratedClient_issueArbitratedReq ; + // register cnpPulseVec_0 + assign cnpPulseVec_0_D_IN = + pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N ; + assign cnpPulseVec_0_EN = 1'd1 ; + // register headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_curDataStreamReg assign headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_curDataStreamReg_D_IN = headerAndMetaDataAndPayloadPipeOut_dataInQ_D_OUT ; @@ -4613,7 +5001,8 @@ module mkTransportLayer(CLK, pktMetaDataAndPayloadPipeOutVec_payloadFilterQ_D_OUT[1] && pktMetaDataAndPayloadPipeOutVec_rdmaHeaderFilterQ_D_OUT[5] && pktMetaDataAndPayloadPipeOutVec_rdmaHeaderFilterQ_D_OUT[4] ; - assign pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_DEQ = 1'b0 ; + assign pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_DEQ = + pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N ; assign pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_CLR = 1'b0 ; // submodule pktMetaDataAndPayloadPipeOutVec_payloadFilterQ @@ -4795,7 +5184,7 @@ module mkTransportLayer(CLK, // submodule pktMetaDataAndPayloadPipeOutVec_rdmaHeaderOutputQ assign pktMetaDataAndPayloadPipeOutVec_rdmaHeaderOutputQ_D_IN = { pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCheckQ_D_OUT[21:9], - pktMetaData_pktFragNum__h38817, + pktMetaData_pktFragNum__h38757, pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCheckQ_D_OUT[2], pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCheckQ_D_OUT[654:30], pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCheckQ_D_OUT[5] && @@ -5494,7 +5883,7 @@ module mkTransportLayer(CLK, CASE_pktMetaDataAndPayloadPipeOutVec_rdmaHeade_ETC__q1) && (qpMetaData_qpVec_0_statusSQ_comm_isERR || IF_pktMetaDataAndPayloadPipeOutVec_rdmaHeaderV_ETC___d1884) ; - assign pktMetaData_pktFragNum__h38817 = + assign pktMetaData_pktFragNum__h38757 = pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCheckQ_D_OUT[2] ? 8'd0 : pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCheckQ_D_OUT[29:22] ; @@ -5775,19 +6164,6 @@ module mkTransportLayer(CLK, qpMetaData_qpVec_0_statusSQ_getTypeQP == 4'd9); endcase end - always@(pdMetaData_pdMrVec_0_mrTagVec_reqQ_D_OUT or - pdMetaData_pdMrVec_0_mrTagVec_dataVec_0 or - pdMetaData_pdMrVec_0_mrTagVec_dataVec_1) - begin - case (pdMetaData_pdMrVec_0_mrTagVec_reqQ_D_OUT[0]) - 1'd0: - CASE_pdMetaData_pdMrVec_0_mrTagVec_reqQD_OUT__ETC__q2 = - pdMetaData_pdMrVec_0_mrTagVec_dataVec_0[101:94]; - 1'd1: - CASE_pdMetaData_pdMrVec_0_mrTagVec_reqQD_OUT__ETC__q2 = - pdMetaData_pdMrVec_0_mrTagVec_dataVec_1[101:94]; - endcase - end always@(pktMetaDataAndPayloadPipeOutVec_payloadPktLenCalcQ_D_OUT or pktMetaDataAndPayloadPipeOutVec_pktValidReg or pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCalcQ_D_OUT) @@ -5812,6 +6188,19 @@ module mkTransportLayer(CLK, pktMetaDataAndPayloadPipeOutVec_payloadPktLenCalcQ_D_OUT[1]); endcase end + always@(pdMetaData_pdMrVec_0_mrTagVec_reqQ_D_OUT or + pdMetaData_pdMrVec_0_mrTagVec_dataVec_0 or + pdMetaData_pdMrVec_0_mrTagVec_dataVec_1) + begin + case (pdMetaData_pdMrVec_0_mrTagVec_reqQ_D_OUT[0]) + 1'd0: + CASE_pdMetaData_pdMrVec_0_mrTagVec_reqQD_OUT__ETC__q2 = + pdMetaData_pdMrVec_0_mrTagVec_dataVec_0[101:94]; + 1'd1: + CASE_pdMetaData_pdMrVec_0_mrTagVec_reqQD_OUT__ETC__q2 = + pdMetaData_pdMrVec_0_mrTagVec_dataVec_1[101:94]; + endcase + end always@(pdMetaData_pdMrVec_0_mrTagVec_reqQ_D_OUT or pdMetaData_pdMrVec_0_mrTagVec_dataVec_0 or pdMetaData_pdMrVec_0_mrTagVec_dataVec_1) @@ -6007,6 +6396,7 @@ module mkTransportLayer(CLK, begin arbitratedDmaReadClt_arbitratedClient_shouldSaveGrantIdxReg <= `BSV_ASSIGNMENT_DELAY 1'd1; + cnpPulseVec_0 <= `BSV_ASSIGNMENT_DELAY 1'd0; headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_stageReg <= `BSV_ASSIGNMENT_DELAY 2'd0; headerAndMetaDataAndPayloadPipeOut_headerMetaDataPipeOutVec_v_taken_signal_0_rv <= `BSV_ASSIGNMENT_DELAY @@ -6042,6 +6432,8 @@ module mkTransportLayer(CLK, if (arbitratedDmaReadClt_arbitratedClient_shouldSaveGrantIdxReg_EN) arbitratedDmaReadClt_arbitratedClient_shouldSaveGrantIdxReg <= `BSV_ASSIGNMENT_DELAY arbitratedDmaReadClt_arbitratedClient_shouldSaveGrantIdxReg_D_IN; + if (cnpPulseVec_0_EN) + cnpPulseVec_0 <= `BSV_ASSIGNMENT_DELAY cnpPulseVec_0_D_IN; if (headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_stageReg_EN) headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_stageReg <= `BSV_ASSIGNMENT_DELAY headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_stageReg_D_IN; @@ -6210,6 +6602,7 @@ module mkTransportLayer(CLK, initial begin arbitratedDmaReadClt_arbitratedClient_shouldSaveGrantIdxReg = 1'h0; + cnpPulseVec_0 = 1'h0; headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_curDataStreamReg = 290'h2AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA; headerAndMetaDataAndPayloadPipeOut_headerAndPayloadPipeOut_headerLastFragByteEnReg = @@ -15472,21 +15865,6 @@ module mkTransportLayer(CLK, rightAlignedByteEn__h33653 != 32'd15 && rightAlignedByteEn__h33653 != 32'd0) $finish(32'd1); - if (RST_N != `BSV_RESET_VALUE) - if (WILL_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_checkPktLen && - pktMetaDataAndPayloadPipeOutVec_payloadPktLenCheckQ_D_OUT[1] && - pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCheckQ_D_OUT[2]) - begin - v__h38749 = $time; - #0; - end - if (RST_N != `BSV_RESET_VALUE) - if (WILL_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_checkPktLen && - pktMetaDataAndPayloadPipeOutVec_payloadPktLenCheckQ_D_OUT[1] && - pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPktLenCheckQ_D_OUT[2]) - $display("time=%0t: InputRdmaPktBuf checkPktLen", - v__h38749, - ", discard zero-length payload for RDMA packet"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_pktMetaDataAndPayloadPipeOutVec_rdmaHeaderPipeOut_popHeaderMetaData && headerAndMetaDataAndPayloadPipeOut_headerMetaDataPipeOut_fifof_rv[16:10] == @@ -15611,29 +15989,6 @@ module mkTransportLayer(CLK, (NOT_headerAndMetaDataAndPayloadPipeOut_headerA_ETC___d1518 || NOT_headerAndMetaDataAndPayloadPipeOut_headerA_ETC___d1549)) $finish(32'd1); - if (RST_N != `BSV_RESET_VALUE) - if (pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N) - begin - v__h40540 = $time; - #0; - end - if (RST_N != `BSV_RESET_VALUE) - if (pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N) - $display("ImmAssert failed in %m @time=%0t: %s-- %s: ", - v__h40540, - "\"TransportLayer.bsv\", line 182, column 13\n", - "pktMetaDataAndPayloadPipeOutVec[0].cnpPipeOut empty assertion @ mkTransportLayerRDMA"); - if (RST_N != `BSV_RESET_VALUE) - if (pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N) - $display("inputPipeOut.notEmpty="); - if (RST_N != `BSV_RESET_VALUE) - if (pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N) - $display("True"); - if (RST_N != `BSV_RESET_VALUE) - if (pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N) - $display(" should be empty"); - if (RST_N != `BSV_RESET_VALUE) - if (pktMetaDataAndPayloadPipeOutVec_cnpOutVec_0_EMPTY_N) $finish(32'd1); end // synopsys translate_on endmodule // mkTransportLayer diff --git a/ethernet/RoCEv2/rtl/RoCEv2AlphaUpdate.vhd b/ethernet/RoCEv2/rtl/RoCEv2AlphaUpdate.vhd new file mode 100644 index 0000000000..bedf5e8dd3 --- /dev/null +++ b/ethernet/RoCEv2/rtl/RoCEv2AlphaUpdate.vhd @@ -0,0 +1,148 @@ +------------------------------------------------------------------------------- +-- Company : SLAC National Accelerator Laboratory +------------------------------------------------------------------------------- +-- Description: Alpha update process +------------------------------------------------------------------------------- +-- This file is part of 'SLAC Firmware Standard Library'. +-- It is subject to the license terms in the LICENSE.txt file found in the +-- top-level directory of this distribution and at: +-- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. +-- No part of 'SLAC Firmware Standard Library', including this file, +-- may be copied, modified, propagated, or distributed except according to +-- the terms contained in the LICENSE.txt file. +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +library surf; +use surf.StdRtlPkg.all; + +entity RoCEv2AlphaUpdate is + generic ( + TPD_G : time := 1 ns; + RST_ASYNC_G : boolean := false; + RST_POLARITY_G : sl := '1' + ); + port ( + clk : in sl; + rst : in sl; + -- Flags + start : in sl; + -- Regs + curAlpha : in slv(9 downto 0); + alphaG : in slv(9 downto 0); + cnpDetected : in sl; + alphaUpdInterval : in slv(15 downto 0); + -- Outputs + newAlpha : out slv(9 downto 0); + valid : out sl + ); +end entity RoCEv2AlphaUpdate; + +architecture rtl of RoCEv2AlphaUpdate is + + type StateType is ( + IDLE_S, + COUNTING_S, + UPDATE_S); + + type RegType is record + timer : slv(15 downto 0); + newAlpha : slv(9 downto 0); + valid : sl; + state : StateType; + end record RegType; + + constant ONE_FP_C : std_logic_vector(10 downto 0) := "10000000000"; -- 1024 + + constant REG_INIT_C : RegType := ( + timer => (others => '0'), + newAlpha => (others => '0'), + valid => '0', + state => IDLE_S); + + signal r : RegType := REG_INIT_C; + signal rin : RegType; + +begin -- architecture rtl + + + comb : process (AlphaG, alphaUpdInterval, cnpDetected, curAlpha, r, rst, + start) is + variable v : RegType; + variable mult : slv(19 downto 0); + variable multS : slv(19 downto 0); + variable multRound : slv(19 downto 0); + variable term2 : slv(10 downto 0); + begin -- process comb + -- Latch the current value + v := r; + -- Reset flags + v.valid := '0'; + -- FSM + case r.state is + ------------------------------------------------------------------------- + when IDLE_S => + v.timer := (others => '0'); + if start = '1' then + v.state := COUNTING_S; + end if; + ----------------------------------------------------------------------- + when COUNTING_S => + v.timer := r.timer + 1; + if r.timer >= alphaUpdInterval then + v.state := UPDATE_S; + end if; + ----------------------------------------------------------------------- + when UPDATE_S => + if cnpDetected = '1' then + mult := curAlpha * AlphaG; + -- multS := mult srl 10; + -- multS := (mult + 512) srl 10; -- add 0.5 in Q0.10 before shifting + multRound := mult + 512; + multS := (others => '0'); + multS(9 downto 0) := multRound(19 downto 10); + term2 := ONE_FP_C - AlphaG; + v.newAlpha := multS(9 downto 0) + term2(9 downto 0); + else + mult := curAlpha * AlphaG; + -- multS := mult srl 10; + -- multS := (mult + 512) srl 10; -- add 0.5 in Q0.10 before shifting + multRound := mult + 512; + multS := (others => '0'); + multS(9 downto 0) := multRound(19 downto 10); + v.newAlpha := multS(9 downto 0); + end if; + v.valid := '1'; + v.timer := (others => '0'); + v.state := COUNTING_S; + ----------------------------------------------------------------------- + end case; + + -- Outputs + newAlpha <= r.newAlpha; + valid <= r.valid; + + -- Reset + if (RST_ASYNC_G = false and rst = RST_POLARITY_G) then + v := REG_INIT_C; + end if; + + -- Register update + rin <= v; + + end process comb; + + seq : process (clk, rst) is + begin + if (RST_ASYNC_G and rst = RST_POLARITY_G) then + r <= REG_INIT_C after TPD_G; + elsif rising_edge(clk) then + r <= rin after TPD_G; + end if; + end process seq; + +end architecture rtl; diff --git a/ethernet/RoCEv2/rtl/RoCEv2AxisBucket.vhd b/ethernet/RoCEv2/rtl/RoCEv2AxisBucket.vhd new file mode 100644 index 0000000000..8a55c23245 --- /dev/null +++ b/ethernet/RoCEv2/rtl/RoCEv2AxisBucket.vhd @@ -0,0 +1,185 @@ +------------------------------------------------------------------------------- +-- Company : SLAC National Accelerator Laboratory +------------------------------------------------------------------------------- +-- Description: TokenBucket implementation in Axi-Stream +------------------------------------------------------------------------------- +-- This file is part of 'SLAC Firmware Standard Library'. +-- It is subject to the license terms in the LICENSE.txt file found in the +-- top-level directory of this distribution and at: +-- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. +-- No part of 'SLAC Firmware Standard Library', including this file, +-- may be copied, modified, propagated, or distributed except according to +-- the terms contained in the LICENSE.txt file. +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +library surf; +use surf.StdRtlPkg.all; +use surf.AxiStreamPkg.all; +use surf.SsiPkg.all; + +entity RoCEv2AxisBucket is + + generic ( + TPD_G : time := 1 ns; + RST_ASYNC_G : boolean := false; + PIPE_STAGES_G : natural := 0; + RST_POLARITY_G : sl := '1'; + FRAC_BITS_G : natural := 16; + BUCKET_SIZE_G : slv(31 downto 0) := x"10000000"; -- in bytes + AXIS_CONFIG_G : AxiStreamConfigType + ); + + port ( + axisClk : in sl; + axisRst : in sl; + byte_per_clk : in slv(15 + FRAC_BITS_G downto 0); -- Q16.16 + packet_size : in slv(31 downto 0); + rd_en : out sl; + sAxisMaster : in AxiStreamMasterType; + sAxisSlave : out AxiStreamSlaveType; + mAxisMaster : out AxiStreamMasterType; + mAxisSlave : in AxiStreamSlaveType + ); +end entity RoCEv2AxisBucket; + +architecture rtl of RoCEv2AxisBucket is + + type FrameState is ( + IDLE_S, + READ_S + ); + + type RegType is record + state : FrameState; + armed : sl; + count : slv(31 + FRAC_BITS_G downto 0); + go_idle : boolean; + axisSlave : AxiStreamSlaveType; + axisMaster : AxiStreamMasterType; + rd_en : sl; + end record RegType; + + constant REG_INIT_C : RegType := ( + state => IDLE_S, + armed => '0', + count => (others => '0'), + go_idle => false, + axisSlave => AXI_STREAM_SLAVE_INIT_C, + axisMaster => axiStreamMasterInit(AXIS_CONFIG_G), + rd_en => '0' + ); + constant BUCKET_FRAC_C : slv(FRAC_BITS_G-1 downto 0) := (others => '0'); + constant BUCKET_SIZE_FULL_C : slv(31 + FRAC_BITS_G downto 0) := BUCKET_SIZE_G & BUCKET_FRAC_C; + + signal r : RegType := REG_INIT_C; + signal rin : RegType; + signal pipeAxisMaster : AxiStreamMasterType; + signal pipeAxisSlave : AxiStreamSlaveType; + +begin -- architecture rtl + + comb : process (axisRst, byte_per_clk, packet_size, pipeAxisSlave, r, + sAxisMaster) is + variable v : RegType; + variable packetSizeFull : slv(31 + FRAC_BITS_G downto 0); + variable fracBitsForPacketSize : slv(FRAC_BITS_G-1 downto 0); + begin -- process comb + -- Latch the current value + v := r; + + -- Init + v.axisSlave.tReady := '0'; + v.rd_en := '0'; + + -- Set fixed point arithmetic + fracBitsForPacketSize := (others => '0'); + packetSizeFull := packet_size & fracBitsForPacketSize; + + -- Choose ready source and clear valid + if (pipeAxisSlave.tReady = '1') then + v.axisMaster.tValid := '0'; + if r.go_idle then + v.go_idle := false; + v.state := IDLE_S; + end if; + end if; + + -- FSM + case r.state is + ------------------------------------------------------------------------- + when IDLE_S => + v.axisMaster := axiStreamMasterInit(AXIS_CONFIG_G); + if sAxisMaster.tValid = '1' and r.count >= packetSizeFull then + v.rd_en := '1'; + v.state := READ_S; + end if; + if r.armed = '0' then + v.state := READ_S; + end if; + when READ_S => + if v.axisMaster.tValid = '0' and r.go_idle = false then + v.axisMaster := sAxisMaster; + v.axisSlave.tReady := '1'; + if v.axisMaster.tValid = '1' and v.axisMaster.tLast = '1' then + v.armed := '1'; + v.go_idle := true; + end if; + end if; + ----------------------------------------------------------------------- + end case; + + -- Increase bucket every clock cycle + if BUCKET_SIZE_FULL_C - r.count > byte_per_clk then + v.count := r.count + byte_per_clk; + else + v.count := BUCKET_SIZE_FULL_C; + end if; + + if v.rd_en = '1' then + v.count := v.count - packetSizeFull; + end if; + + -- Outputs + pipeAxisMaster <= r.axisMaster; + sAxisSlave <= v.axisSlave; + rd_en <= v.rd_en; + + -- Synchronous Reset + if (RST_ASYNC_G = false and axisRst = RST_POLARITY_G) then + v := REG_INIT_C; + end if; + + -- Register the variable for next clock cycle + rin <= v; + + end process comb; + + seq : process (axisClk, axisRst) is + begin + if (RST_ASYNC_G) and (axisRst = RST_POLARITY_G) then + r <= REG_INIT_C after TPD_G; + elsif rising_edge(axisClk) then + r <= rin after TPD_G; + end if; + end process seq; + +-- Optional output pipeline registers to ease timing + AxiStreamPipeline_1 : entity surf.AxiStreamPipeline + generic map ( + TPD_G => TPD_G, + RST_ASYNC_G => RST_ASYNC_G, + PIPE_STAGES_G => PIPE_STAGES_G) + port map ( + axisClk => axisClk, + axisRst => axisRst, + sAxisMaster => pipeAxisMaster, + sAxisSlave => pipeAxisSlave, + mAxisMaster => mAxisMaster, + mAxisSlave => mAxisSlave); + +end architecture rtl; diff --git a/ethernet/RoCEv2/rtl/RoCEv2Dcqcn.vhd b/ethernet/RoCEv2/rtl/RoCEv2Dcqcn.vhd new file mode 100644 index 0000000000..c47ed09b38 --- /dev/null +++ b/ethernet/RoCEv2/rtl/RoCEv2Dcqcn.vhd @@ -0,0 +1,378 @@ +------------------------------------------------------------------------------- +-- Company : SLAC National Accelerator Laboratory +------------------------------------------------------------------------------- +-- Description: DCQCN top +------------------------------------------------------------------------------- +-- This file is part of 'SLAC Firmware Standard Library'. +-- It is subject to the license terms in the LICENSE.txt file found in the +-- top-level directory of this distribution and at: +-- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. +-- No part of 'SLAC Firmware Standard Library', including this file, +-- may be copied, modified, propagated, or distributed except according to +-- the terms contained in the LICENSE.txt file. +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +library surf; +use surf.StdRtlPkg.all; +use surf.AxiStreamPkg.all; +use surf.AxiLitePkg.all; +use surf.SsiPkg.all; + +entity RoCEv2Dcqcn is + + generic ( + TPD_G : time := 1 ns; + LINE_RATE_G : integer := 1_250_000_000; -- 1.25 GB/s = 10 Gb/s + CLK_FREQ_G : real := 156.25E+6; + AXIS_CONFIG_G : AxiStreamConfigType := SSI_CONFIG_INIT_C; + RST_ASYNC_G : boolean := false; + RST_POLARITY_G : sl := '1' + ); + port ( + axisClk : in sl; + axisRst : in sl; + -- CNP + cnp : in sl; + -- AXI-Lite Interface + axilReadMaster : in AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C; + axilReadSlave : out AxiLiteReadSlaveType; + axilWriteMaster : in AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C; + axilWriteSlave : out AxiLiteWriteSlaveType; + -- AXI-Stream Interface + sAxisMaster : in AxiStreamMasterType; + sAxisSlave : out AxiStreamSlaveType; + mAxisMaster : out AxiStreamMasterType; + mAxisSlave : in AxiStreamSlaveType + ); + +end entity RoCEv2Dcqcn; + +architecture rtl of RoCEv2Dcqcn is + + constant CNP_COUNTER_BITS_C : positive range 1 to 20 := 16; + + type StateType is ( + IDLE_S, + THE_CNP_AFTERMATH_S + ); + + type RegType is record + Rc : slv(31 downto 0); -- Current rate, int + Rt : slv(31 downto 0); -- Target rate, int + alpha : slv(9 downto 0); -- alpha, int + alphaG : slv(9 downto 0); -- (1-g), axil + dec_gain : slv(3 downto 0); -- Rc=Rc(1-alpha/2^dec_gain), axil + Rai : slv(31 downto 0); -- Additive step, axil + Rhai : slv(31 downto 0); -- Hyper step, axil + clampTgtRate : sl; -- Clamp target rate step, axil + Rmin : slv(31 downto 0); -- Minimum rate, axil + cnpDecDetected : sl; -- CNP detected for decrement process + cnpAlphaDetected : sl; -- CNP detected for alpha process + cnpCnt : slv(CNP_COUNTER_BITS_C-1 downto 0); -- CNP counter + cnpCntRst : sl; -- CNP counter reset + incReset : sl; -- Reset increment process timers + incEn : sl; -- Enable Increase process + decEn : sl; -- Enbale decrease process + alphaUpdEn : sl; -- Enable alpha update process + rateIncInterval : slv(31 downto 0); -- Interval for increase stage, axil + rateDecInterval : slv(15 downto 0); -- Interval for decrease stage, axil + alphaUpdInterval : slv(15 downto 0); -- Interval for alpha update, axil + timeStageThreshold : slv(7 downto 0); -- Threshold for increase stage, axil + firstCnp : boolean; + axilReadSlave : AxiLiteReadSlaveType; + axilWriteSlave : AxiLiteWriteSlaveType; + state : StateType; + end record RegType; + + constant CLK_PERIOD_C : real := 1.0/CLK_FREQ_G; -- sec + constant LINE_RATE_SLV_C : slv(31 downto 0) := conv_std_logic_vector(LINE_RATE_G, 32); + -- Time intervals in sec + constant RATE_INC_INTERVAL_INIT_C : real := 1.5E-3; -- sec + constant RATE_DEC_INTERVAL_INIT_C : real := 4.0E-6; -- sec + constant ALPHA_UPD_INTERVAL_INIT_C : real := 55.0E-6; -- sec + -- Time interval in clk periods + constant RATE_INC_INTERVAL_CLK_CYCLES_INIT_C : slv(31 downto 0) := toSlv(getTimeRatio(RATE_INC_INTERVAL_INIT_C, CLK_PERIOD_C), 32); + constant RATE_DEC_INTERVAL_CLK_CYCLES_INIT_C : slv(15 downto 0) := toSlv(getTimeRatio(RATE_DEC_INTERVAL_INIT_C, CLK_PERIOD_C), 16); + constant ALPHA_UPD_INTERVAL_CLK_CYCLES_INIT_C : slv(15 downto 0) := toSlv(getTimeRatio(ALPHA_UPD_INTERVAL_INIT_C, CLK_PERIOD_C), 16); + + constant REG_INIT_C : RegType := ( + Rc => LINE_RATE_SLV_C, -- 1250 GB/s = 10 Gb/s + Rt => LINE_RATE_SLV_C, + alpha => (others => '1'), -- Q0.10 => 1 + alphaG => "1111111100", -- Q0.10 => (1-2^8) + dec_gain => x"1", -- Rt=Rc(1-alpha/2) + Rai => x"005B8D80", -- 6 MB/s + Rhai => x"00B71B00", -- 12 MB/s + clampTgtRate => '0', -- false + Rmin => x"00989680", -- 10 MB/s + cnpDecDetected => '0', + cnpAlphaDetected => '0', + cnpCnt => (others => '0'), + cnpCntRst => '0', + incReset => '0', + incEn => '0', + decEn => '0', + alphaUpdEn => '0', + rateIncInterval => RATE_INC_INTERVAL_CLK_CYCLES_INIT_C, + rateDecInterval => RATE_DEC_INTERVAL_CLK_CYCLES_INIT_C, + alphaUpdInterval => ALPHA_UPD_INTERVAL_CLK_CYCLES_INIT_C, + timeStageThreshold => x"05", + firstCnp => true, + axilReadSlave => AXI_LITE_READ_SLAVE_INIT_C, + axilWriteSlave => AXI_LITE_WRITE_SLAVE_INIT_C, + state => IDLE_S); + + signal r : RegType := REG_INIT_C; + signal rin : RegType; + + signal timeStage : slv(7 downto 0); + signal cnpRe : sl; + + signal newDecRc : slv(31 downto 0); + signal newDecRt : slv(31 downto 0); + signal newIncRc : slv(31 downto 0); + signal newIncRt : slv(31 downto 0); + signal newAlpha : slv(9 downto 0); + + signal decValid : sl; + signal incValid : sl; + signal alphaValid : sl; + + signal cnpCnt : slv(CNP_COUNTER_BITS_C-1 downto 0); + signal cnpCntRst : sl; + +begin -- architecture rtl + + ----------------------------------------------------------------------------- + -- CNP rising edge + counter + ----------------------------------------------------------------------------- + CnpEdge_1 : entity surf.SynchronizerEdge + generic map ( + TPD_G => TPD_G, + STAGES_G => 3 + ) + port map ( + clk => axisClk, + rst => axisRst, + dataIn => cnp, + risingEdge => cnpRe + ); + + SynchronizerOneShotCnt_1 : entity surf.SynchronizerOneShotCnt + generic map ( + TPD_G => TPD_G, + COMMON_CLK_G => true, + CNT_WIDTH_G => CNP_COUNTER_BITS_C) + port map ( + wrClk => axisClk, + wrRst => axisRst, + dataIn => cnpRe, + rdClk => axisClk, + rdRst => axisRst, + rollOverEn => '1', + cntRst => cnpCntRst, + dataOut => open, + cntOut => cnpCnt); + + ----------------------------------------------------------------------------- + -- Rate decrease process + ----------------------------------------------------------------------------- + RateDecProc_1 : entity surf.RoCEv2RateDecProc + generic map ( + TPD_G => TPD_G, + RST_ASYNC_G => RST_ASYNC_G, + RST_POLARITY_G => RST_POLARITY_G) + port map ( + clk => axisClk, + rst => axisRst, + start => r.decEn, + cnpDetected => r.cnpDecDetected, + clampTgtRate => r.clampTgtRate, + alpha => r.alpha, + dec_gain => r.dec_gain, + Rmin => r.Rmin, + rateDecInterval => r.rateDecInterval, + timeStage => timeStage, + curRc => r.Rc, + curRt => r.Rt, + newRc => newDecRc, + newRt => newDecRt, + valid => decValid + ); + + ----------------------------------------------------------------------------- + -- Rate increase process + ----------------------------------------------------------------------------- + RateIncProc_1 : entity surf.RoCEv2RateIncProc + generic map ( + TPD_G => TPD_G, + LINE_RATE_G => LINE_RATE_G, + RST_ASYNC_G => RST_ASYNC_G, + RST_POLARITY_G => RST_POLARITY_G) + port map ( + clk => axisClk, + rst => axisRst, + start => r.incEn, + rstTimers => r.incReset, + rateIncInterval => r.rateIncInterval, + Rai => r.Rai, + Rhai => r.Rhai, + curRc => r.Rc, + curRt => r.Rt, + timeStageThreshold => r.timeStageThreshold, + timeStage => timeStage, + newRc => newIncRc, + newRt => newIncRt, + valid => incValid + ); + + ----------------------------------------------------------------------------- + -- Alpha update process + ----------------------------------------------------------------------------- + AlphaUpdate_1 : entity surf.RoCEv2AlphaUpdate + generic map ( + TPD_G => TPD_G, + RST_ASYNC_G => RST_ASYNC_G, + RST_POLARITY_G => RST_POLARITY_G) + port map ( + clk => axisClk, + rst => axisRst, + start => r.alphaUpdEn, + curAlpha => r.alpha, + alphaG => r.alphaG, + cnpDetected => r.cnpAlphaDetected, + alphaUpdInterval => r.alphaUpdInterval, + newAlpha => newAlpha, + valid => alphaValid); + + ----------------------------------------------------------------------------- + -- Token Bucket + ----------------------------------------------------------------------------- + TokenBucket_1 : entity surf.RoCEv2TokenBucket + generic map ( + TPD_G => TPD_G, + CLK_FREQ_G => CLK_FREQ_G, + FRAC_BITS_G => 16, + AXIS_CONFIG_G => AXIS_CONFIG_G) + port map ( + axisClk => axisClk, + axisRst => axisRst, + sAxisMaster => sAxisMaster, + sAxisSlave => sAxisSlave, + Rc => r.Rc, + mAxisMaster => mAxisMaster, + mAxisSlave => mAxisSlave); + + ----------------------------------------------------------------------------- + -- DCQCN + ----------------------------------------------------------------------------- + comb : process (alphaValid, axilReadMaster, axilWriteMaster, axisRst, + cnpCnt, cnpRe, decValid, incValid, newAlpha, newDecRc, + newDecRt, newIncRc, newIncRt, r) is + variable v : RegType; + variable axilEp : AxiLiteEndPointType; + begin -- process comb + -- Latch the current value + v := r; + -- Update counter + v.cnpCnt := cnpCnt; + --------------------------------------------------------------------------- + -- Axi-Lite interface + --------------------------------------------------------------------------- + -- Determine the transaction type + axiSlaveWaitTxn(axilEp, axilWriteMaster, axilReadMaster, v.axilWriteSlave, v.axilReadSlave); + -- Gen registers + axiSlaveRegister(axilEp, x"000", 0, v.alphaG); + axiSlaveRegister(axilEp, x"000", 10, v.dec_gain); + axiSlaveRegister(axilEp, x"000", 14, v.timeStageThreshold); + axiSlaveRegister(axilEp, x"000", 22, v.clampTgtRate); + axiSlaveRegister(axilEp, x"004", 0, v.Rai); + axiSlaveRegister(axilEp, x"008", 0, v.Rhai); + axiSlaveRegister(axilEp, x"00C", 0, v.Rmin); + axiSlaveRegister(axilEp, x"010", 0, v.rateIncInterval); + axiSlaveRegister(axilEp, x"014", 0, v.rateDecInterval); + axiSlaveRegister(axilEp, x"014", 16, v.alphaUpdInterval); + axiSlaveRegisterR(axilEp, x"018", 0, r.Rc); + axiSlaveRegisterR(axilEp, x"01C", 0, r.Rt); + axiSlaveRegisterR(axilEp, x"020", 0, r.alpha); + axiSlaveRegister(axilEp, x"020", 10, v.cnpCntRst); + axiSlaveRegisterR(axilEp, x"020", 11, r.cnpCnt); + -- Closeout the transaction + axiSlaveDefault(axilEp, v.axilWriteSlave, v.axilReadSlave, AXI_RESP_DECERR_C); + + --------------------------------------------------------------------------- + -- DCQCN Overseer + --------------------------------------------------------------------------- + -- CNP effect + case r.state is + ------------------------------------------------------------------------- + when IDLE_S => + ----------------------------------------------------------------------- + if cnpRe = '1' then + v.cnpAlphaDetected := '1'; + v.cnpDecDetected := '1'; + v.alphaUpdEn := '1'; + v.decEn := '1'; + v.incEn := '1'; + v.incReset := '1'; + v.state := THE_CNP_AFTERMATH_S; + if r.firstCnp then + v.alpha := (others => '1'); + v.cnpAlphaDetected := '0'; + v.firstCnp := false; + end if; + end if; + ----------------------------------------------------------------------- + when THE_CNP_AFTERMATH_S => + v.incReset := '0'; + v.state := IDLE_S; + ----------------------------------------------------------- + end case; + -- Update value for inc process + if incValid = '1' then + v.Rc := newIncRc; + v.Rt := newIncRt; + end if; + -- Update value and rst CNP for dec process + if decValid = '1' then + v.cnpDecDetected := '0'; + v.Rc := newDecRc; + v.Rt := newDecRt; + end if; + -- Update value and rst CNP for alpha process + if alphaValid = '1' then + v.cnpAlphaDetected := '0'; + v.alpha := newAlpha; + end if; + + -- Outputs + axilWriteSlave <= r.axilWriteSlave; + axilReadSlave <= r.axilReadSlave; + cnpCntRst <= r.cnpCntRst; + + -- Reset + if (RST_ASYNC_G = false and axisRst = RST_POLARITY_G) then + v := REG_INIT_C; + end if; + + -- Register update + rin <= v; + + end process comb; + + seq : process (axisClk, axisRst) is + begin + if (RST_ASYNC_G and axisRst = RST_POLARITY_G) then + r <= REG_INIT_C after TPD_G; + elsif rising_edge(axisClk) then + r <= rin after TPD_G; + end if; + end process seq; + + +end architecture rtl; diff --git a/ethernet/RoCEv2/rtl/RoceEngineWrapper.vhd b/ethernet/RoCEv2/rtl/RoCEv2Engine.vhd similarity index 76% rename from ethernet/RoCEv2/rtl/RoceEngineWrapper.vhd rename to ethernet/RoCEv2/rtl/RoCEv2Engine.vhd index ca7f829cb3..208fd75e49 100755 --- a/ethernet/RoCEv2/rtl/RoceEngineWrapper.vhd +++ b/ethernet/RoCEv2/rtl/RoCEv2Engine.vhd @@ -20,13 +20,15 @@ use surf.StdRtlPkg.all; use surf.AxiStreamPkg.all; use surf.AxiLitePkg.all; use surf.SsiPkg.all; -use surf.RocePkg.all; +use surf.RoCEv2Pkg.all; -entity RoceEngineWrapper is +entity RoCEv2Engine is generic ( - TPD_G : time := 1 ns; - RST_POLARITY_G : sl := '1'; -- '1' for active HIGH reset, '0' for active LOW reset - EXT_ROCE_CONFIG_G : boolean := false); + TPD_G : time := 1 ns; + RST_POLARITY_G : sl := '1'; -- '1' for active HIGH reset, '0' for active LOW reset + DCQCN_EN_G : boolean := true; + AXIL_BASE_ADDR_G : slv(31 downto 0) := x"00000000"; + EXT_ROCE_CONFIG_G : boolean := false); port ( clk : in sl; rst : in sl; @@ -41,10 +43,10 @@ entity RoceEngineWrapper is ibUdpMaster : out AxiStreamMasterType; ibUdpSlave : in AxiStreamSlaveType; -- MetaData Config Bus - sAxisMetaDataMaster : in AxiStreamMasterType; + sAxisMetaDataMaster : in AxiStreamMasterType := AXI_STREAM_MASTER_INIT_C; sAxisMetaDataSlave : out AxiStreamSlaveType; mAxisMetaDataMaster : out AxiStreamMasterType; - mAxisMetaDataSlave : in AxiStreamSlaveType; + mAxisMetaDataSlave : in AxiStreamSlaveType := AXI_STREAM_SLAVE_FORCE_C; -- AXI-Lite Interface axilReadMaster : in AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C; axilReadSlave : out AxiLiteReadSlaveType; @@ -54,10 +56,12 @@ entity RoceEngineWrapper is dmaReadRespMaster : in RoceDmaReadRespMasterType; dmaReadRespSlave : out RoceDmaReadRespSlaveType; dmaReadReqMaster : out RoceDmaReadReqMasterType; - dmaReadReqSlave : in RoceDmaReadReqSlaveType); -end RoceEngineWrapper; + dmaReadReqSlave : in RoceDmaReadReqSlaveType; + -- CNP + cnp_received : out sl); +end RoCEv2Engine; -architecture mapping of RoceEngineWrapper is +architecture mapping of RoCEv2Engine is component mkAxiSTransportLayer port ( @@ -125,8 +129,15 @@ architecture mapping of RoceEngineWrapper is s_dma_read_wr_id : in std_logic_vector(63 downto 0); s_dma_read_is_resp_err : in std_logic; s_dma_read_data_stream : in std_logic_vector(289 downto 0); - s_dma_read_ready : out std_logic); - end component; + s_dma_read_ready : out std_logic; + cnp_received : out std_logic); + end component mkAxiSTransportLayer; + + constant NUM_AXIL_MASTERS_C : positive := 2; + constant XBAR_CONFIG_C : AxiLiteCrossbarMasterConfigArray(NUM_AXIL_MASTERS_C-1 downto 0) := + genAxiLiteConfig(NUM_AXIL_MASTERS_C, AXIL_BASE_ADDR_G, 16, 12); + constant XBAR_ROCE_CONFIG_C : natural := 0; + constant XBAR_DCQCN_CONFIG_C : natural := 1; signal roceRstN : sl; signal obUdpRoceMaster_tValid : sl; @@ -144,10 +155,14 @@ architecture mapping of RoceEngineWrapper is signal ibUdpRoceMaster_tUser : slv(1 downto 0); signal ibUdpRoceSlave_tReady : sl; - signal obUdpRoceMaster : AxiStreamMasterType; - signal obUdpRoceSlave : AxiStreamSlaveType; - signal ibUdpRoceMaster : AxiStreamMasterType; - signal ibUdpRoceSlave : AxiStreamSlaveType; + signal obUdpRoceMaster : AxiStreamMasterType; + signal obUdpRoceSlave : AxiStreamSlaveType; + signal ibUdpRoceMaster : AxiStreamMasterType; + signal ibUdpRoceSlave : AxiStreamSlaveType; + signal obUdpMasterDcqcn : AxiStreamMasterType; + signal obUdpSlaveDcqcn : AxiStreamSlaveType; + signal ibUdpMasterDcqcn : AxiStreamMasterType; + signal ibUdpSlaveDcqcn : AxiStreamSlaveType; signal s_axisMetaDataReqMaster : AxiStreamMasterType; signal s_axisMetaDataReqSlave : AxiStreamSlaveType; @@ -158,16 +173,72 @@ architecture mapping of RoceEngineWrapper is signal s_axisMetaDataRespMasterMux : AxiStreamMasterType; signal s_axisMetaDataRespSlaveMux : AxiStreamSlaveType; + signal axilWriteMastersX : AxiLiteWriteMasterArray(NUM_AXIL_MASTERS_C-1 downto 0); + signal axilWriteSlavesX : AxiLiteWriteSlaveArray(NUM_AXIL_MASTERS_C-1 downto 0) := (others => AXI_LITE_WRITE_SLAVE_EMPTY_SLVERR_C); + signal axilReadMastersX : AxiLiteReadMasterArray(NUM_AXIL_MASTERS_C-1 downto 0); + signal axilReadSlavesX : AxiLiteReadSlaveArray(NUM_AXIL_MASTERS_C-1 downto 0) := (others => AXI_LITE_READ_SLAVE_EMPTY_SLVERR_C); + + signal s_cnp_received : sl; + begin - roceRstN <= not rst when (RST_POLARITY_G = '1') else rst; + roceRstN <= not rst when (RST_POLARITY_G = '1') else rst; + cnp_received <= s_cnp_received; + + ---------------------------------------------------------------------------- + -- AxiLite Xbar + ---------------------------------------------------------------------------- + U_XBAR : entity surf.AxiLiteCrossbar + generic map ( + TPD_G => TPD_G, + NUM_SLAVE_SLOTS_G => 1, + NUM_MASTER_SLOTS_G => NUM_AXIL_MASTERS_C, + MASTERS_CONFIG_G => XBAR_CONFIG_C) + port map ( + axiClk => clk, + axiClkRst => rst, + sAxiWriteMasters(0) => axilWriteMaster, + sAxiWriteSlaves(0) => axilWriteSlave, + sAxiReadMasters(0) => axilReadMaster, + sAxiReadSlaves(0) => axilReadSlave, + mAxiWriteMasters => axilWriteMastersX, + mAxiWriteSlaves => axilWriteSlavesX, + mAxiReadMasters => axilReadMastersX, + mAxiReadSlaves => axilReadSlavesX); + + ----------------------------------------------------------------------------- + -- DCQCN Congestion Control + ----------------------------------------------------------------------------- + GEN_DCQCN : if DCQCN_EN_G generate + Dcqcn_1 : entity surf.RoCEv2Dcqcn + generic map ( + TPD_G => TPD_G, + AXIS_CONFIG_G => ROCEV2_AXIS_CONFIG_C) + port map ( + axisClk => clk, + axisRst => rst, + cnp => s_cnp_received, + axilReadMaster => axilReadMastersX(XBAR_DCQCN_CONFIG_C), + axilReadSlave => axilReadSlavesX(XBAR_DCQCN_CONFIG_C), + axilWriteMaster => axilWriteMastersX(XBAR_DCQCN_CONFIG_C), + axilWriteSlave => axilWriteSlavesX(XBAR_DCQCN_CONFIG_C), + sAxisMaster => ibUdpMasterDcqcn, + sAxisSlave => ibUdpSlaveDcqcn, + mAxisMaster => ibUdpMaster, + mAxisSlave => ibUdpSlave); + end generate GEN_DCQCN; + + BYPASS_DCQCN : if not DCQCN_EN_G generate + ibUdpMaster <= ibUdpMasterDcqcn; + ibUdpSlaveDcqcn <= ibUdpSlave; + end generate BYPASS_DCQCN; ----------------------------------------------------------------------------- -- Adjust Roce/SURF interface ----------------------------------------------------------------------------- AxiStreamResize_Inst : entity surf.RoceResizeAndSwap generic map ( - SLAVE_AXI_CONFIG_G => SURF_DATA_STREAM_CONFIG_C, + SLAVE_AXI_CONFIG_G => ROCEV2_AXIS_CONFIG_C, MASTER_AXI_CONFIG_G => BLUE_DATA_STREAM_CONFIG_C, SWAP_ENDIAN_G => true, LITTLE_ENDIAN_G => false) @@ -182,7 +253,7 @@ begin AxiStreamResize_1 : entity surf.RoceResizeAndSwap generic map ( SLAVE_AXI_CONFIG_G => BLUE_DATA_STREAM_CONFIG_C, - MASTER_AXI_CONFIG_G => SURF_DATA_STREAM_CONFIG_C, + MASTER_AXI_CONFIG_G => ROCEV2_AXIS_CONFIG_C, SWAP_ENDIAN_G => true, LITTLE_ENDIAN_G => false) port map ( @@ -190,8 +261,8 @@ begin axisRst => rst, sAxisMaster => ibUdpRoceMaster, sAxisSlave => ibUdpRoceSlave, - mAxisMaster => ibUdpMaster, - mAxisSlave => ibUdpSlave); + mAxisMaster => ibUdpMasterDcqcn, + mAxisSlave => ibUdpSlaveDcqcn); ----------------------------------------------------------------------------- -- IP Integrator @@ -298,16 +369,17 @@ begin s_dma_read_wr_id => dmaReadRespMaster.wrId, s_dma_read_is_resp_err => dmaReadRespMaster.isRespErr, s_dma_read_data_stream => dmaReadRespMaster.dataStream, - s_dma_read_ready => dmaReadRespSlave.ready); + s_dma_read_ready => dmaReadRespSlave.ready, + cnp_received => s_cnp_received); ----------------------------------------------------------------------------- -- RoCE Metadata Configurator ----------------------------------------------------------------------------- ROCE_EXT_CONFIG_GEN : if EXT_ROCE_CONFIG_G generate - s_axisMetaDataReqMaster <= AXI_STREAM_MASTER_INIT_C; - s_axisMetaDataRespSlave <= AXI_STREAM_SLAVE_FORCE_C; - axilReadSlave <= AXI_LITE_READ_SLAVE_EMPTY_DECERR_C; - axilWriteSlave <= AXI_LITE_WRITE_SLAVE_EMPTY_DECERR_C; + s_axisMetaDataReqMaster <= AXI_STREAM_MASTER_INIT_C; + s_axisMetaDataRespSlave <= AXI_STREAM_SLAVE_FORCE_C; + axilReadSlavesX(XBAR_ROCE_CONFIG_C) <= AXI_LITE_READ_SLAVE_EMPTY_DECERR_C; + axilWriteSlavesX(XBAR_ROCE_CONFIG_C) <= AXI_LITE_WRITE_SLAVE_EMPTY_DECERR_C; end generate ROCE_EXT_CONFIG_GEN; ROCE_INT_CONFIG_GEN : if not EXT_ROCE_CONFIG_G generate @@ -322,10 +394,10 @@ begin mAxisMetaDataReqSlave => s_axisMetaDataReqSlave, sAxisMetaDataRespMaster => s_axisMetaDataRespMaster, sAxisMetaDataRespSlave => s_axisMetaDataRespSlave, - axilReadMaster => axilReadMaster, - axilReadSlave => axilReadSlave, - axilWriteMaster => axilWriteMaster, - axilWriteSlave => axilWriteSlave); + axilReadMaster => axilReadMastersX(XBAR_ROCE_CONFIG_C), + axilReadSlave => axilReadSlavesX(XBAR_ROCE_CONFIG_C), + axilWriteMaster => axilWriteMastersX(XBAR_ROCE_CONFIG_C), + axilWriteSlave => axilWriteSlavesX(XBAR_ROCE_CONFIG_C)); end generate ROCE_INT_CONFIG_GEN; ----------------------------------------------------------------------------- diff --git a/ethernet/RoCEv2/rtl/EthMacRxRoCEv2.vhd b/ethernet/RoCEv2/rtl/RoCEv2EthMacRx.vhd similarity index 98% rename from ethernet/RoCEv2/rtl/EthMacRxRoCEv2.vhd rename to ethernet/RoCEv2/rtl/RoCEv2EthMacRx.vhd index b42fbe291a..262ea35a04 100755 --- a/ethernet/RoCEv2/rtl/EthMacRxRoCEv2.vhd +++ b/ethernet/RoCEv2/rtl/RoCEv2EthMacRx.vhd @@ -22,7 +22,7 @@ use surf.AxiStreamPkg.all; use surf.StdRtlPkg.all; use surf.EthMacPkg.all; -entity EthMacRxRoCEv2 is +entity RoCEv2EthMacRx is generic ( TPD_G : time := 1 ns; RST_POLARITY_G : sl := '1'); -- '1' for active HIGH reset, '0' for active LOW reset @@ -34,9 +34,9 @@ entity EthMacRxRoCEv2 is obCsumMaster : in AxiStreamMasterType; -- Bypass Interface ibBypassMaster : out AxiStreamMasterType); -end EthMacRxRoCEv2; +end RoCEv2EthMacRx; -architecture mapping of EthMacRxRoCEv2 is +architecture mapping of RoCEv2EthMacRx is constant ROCE_CRC32_AXI_CONFIG_C : AxiStreamConfigType := ( TSTRB_EN_C => false, @@ -220,6 +220,7 @@ begin RST_POLARITY_G => RST_POLARITY_G, VALID_THOLD_G => 0, GEN_SYNC_FIFO_G => true, + FIFO_PAUSE_THRESH_G => (2**4), SLAVE_AXI_CONFIG_G => EMAC_AXIS_CONFIG_C, MASTER_AXI_CONFIG_G => EMAC_AXIS_CONFIG_C) port map ( diff --git a/ethernet/RoCEv2/rtl/RocePkg.vhd b/ethernet/RoCEv2/rtl/RoCEv2Pkg.vhd similarity index 98% rename from ethernet/RoCEv2/rtl/RocePkg.vhd rename to ethernet/RoCEv2/rtl/RoCEv2Pkg.vhd index cc8338becb..38020330a1 100644 --- a/ethernet/RoCEv2/rtl/RocePkg.vhd +++ b/ethernet/RoCEv2/rtl/RoCEv2Pkg.vhd @@ -22,7 +22,7 @@ use surf.StdRtlPkg.all; use surf.AxiStreamPkg.all; use surf.SsiPkg.all; -package RocePkg is +package RoCEv2Pkg is -- Types constant TDATA_ROCE_NUM_BYTES_C : natural range 1 to 128 := 32; @@ -33,8 +33,9 @@ package RocePkg is tDestBits => 0 ); - constant SURF_DATA_STREAM_CONFIG_C : AxiStreamConfigType := ssiAxiStreamConfig( + constant ROCEV2_AXIS_CONFIG_C : AxiStreamConfigType := ssiAxiStreamConfig( dataBytes => TDATA_UDP_NUM_BYTES_C, + tKeepMode => TKEEP_NORMAL_C, tDestBits => 0 ); @@ -281,9 +282,9 @@ package RocePkg is -- rKeyToInv : slv(32 downto 0)) -- return RoceWorkCompMasterType; -end package RocePkg; +end package RoCEv2Pkg; -package body RocePkg is +package body RoCEv2Pkg is function ToRoceWorkReqMasterType ( valid : sl; @@ -470,4 +471,4 @@ package body RocePkg is -- end function ToRoceWorkCompMasterType; -end package body RocePkg; +end package body RoCEv2Pkg; diff --git a/ethernet/RoCEv2/rtl/RoCEv2RateDecProc.vhd b/ethernet/RoCEv2/rtl/RoCEv2RateDecProc.vhd new file mode 100644 index 0000000000..fffb7d9911 --- /dev/null +++ b/ethernet/RoCEv2/rtl/RoCEv2RateDecProc.vhd @@ -0,0 +1,175 @@ +------------------------------------------------------------------------------- +-- Company : SLAC National Accelerator Laboratory +------------------------------------------------------------------------------- +-- Description: Rate decrement process +------------------------------------------------------------------------------- +-- This file is part of 'SLAC Firmware Standard Library'. +-- It is subject to the license terms in the LICENSE.txt file found in the +-- top-level directory of this distribution and at: +-- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. +-- No part of 'SLAC Firmware Standard Library', including this file, +-- may be copied, modified, propagated, or distributed except according to +-- the terms contained in the LICENSE.txt file. +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +library surf; +use surf.StdRtlPkg.all; + +entity RoCEv2RateDecProc is + generic ( + TPD_G : time := 1 ns; + RST_ASYNC_G : boolean := false; + RST_POLARITY_G : sl := '1' + ); + port ( + clk : in sl; + rst : in sl; + -- Flags + start : in sl; + cnpDetected : in sl; + -- Regs + clampTgtRate : in sl; + alpha : in slv(9 downto 0); + dec_gain : in slv(3 downto 0); + Rmin : in slv(31 downto 0); + rateDecInterval : in slv(15 downto 0); + timeStage : in slv(7 downto 0); + curRc : in slv(31 downto 0); + curRt : in slv(31 downto 0); + -- Outputs + newRc : out slv(31 downto 0); + newRt : out slv(31 downto 0); + valid : out sl + ); +end entity RoCEv2RateDecProc; + +architecture rtl of RoCEv2RateDecProc is + + type StateType is ( + IDLE_S, + COUNTING_S, + UPDATE1_S, + UPDATE2_S); + + type RegType is record + timer : slv(15 downto 0); + newRc : slv(31 downto 0); + newRt : slv(31 downto 0); + doUpdate : sl; + mult : slv(41 downto 0); + shift_val : integer; + valid : sl; + state : StateType; + end record RegType; + + constant REG_INIT_C : RegType := ( + timer => (others => '0'), + newRc => (others => '0'), + newRt => (others => '0'), + doUpdate => '0', + mult => (others => '0'), + shift_val => 0, + valid => '0', + state => IDLE_S); + + signal r : RegType := REG_INIT_C; + signal rin : RegType; + +begin -- architecture rtl + + comb : process (Rmin, alpha, clampTgtRate, cnpDetected, curRc, curRt, + dec_gain, r, rateDecInterval, rst, start, timeStage) is + variable v : RegType; + variable clamp : boolean; + variable shifted : slv(41 downto 0); + variable delta : slv(31 downto 0); + begin -- process comb + -- Latch the current value + v := r; + -- Reset flags + v.valid := '0'; + clamp := true; + -- FSM + case r.state is + ------------------------------------------------------------------------- + when IDLE_S => + v.timer := (others => '0'); + if start = '1' then + v.state := COUNTING_S; + end if; + ----------------------------------------------------------------------- + when COUNTING_S => + v.timer := r.timer + 1; + if r.timer >= rateDecInterval then + v.state := UPDATE1_S; + end if; + ----------------------------------------------------------------------- + when UPDATE1_S => + if cnpDetected = '1' then + -- Compute target rate + if clampTgtRate = '0' and timeStage = x"00" then + clamp := false; + end if; + if clamp then + v.newRt := curRc; + else + v.newRt := curRt; + end if; + -- Multiply only (heavy op) + v.mult := curRc * alpha; + -- store shift value if needed + v.shift_val := conv_integer(dec_gain) + 10; + v.doUpdate := '1'; + else + v.doUpdate := '0'; + end if; + v.state := UPDATE2_S; + ----------------------------------------------------------------------- + when UPDATE2_S => + if r.doUpdate = '1' then + -- shift + shifted := (others => '0'); + shifted(shifted'high - r.shift_val downto 0) := r.mult(shifted'high downto r.shift_val); + delta := shifted(31 downto 0); + -- subtraction + v.newRc := curRc - delta; + if v.newRc < Rmin then + v.newRc := Rmin; + end if; + v.valid := '1'; + end if; + v.timer := (others => '0'); + v.state := COUNTING_S; + ----------------------------------------------------------------------- + end case; + + -- Outputs + newRc <= r.newRc; + newRt <= r.newRt; + valid <= r.valid; + + -- Reset + if (RST_ASYNC_G = false and rst = RST_POLARITY_G) then + v := REG_INIT_C; + end if; + + -- Register update + rin <= v; + + end process comb; + + seq : process (clk, rst) is + begin + if (RST_ASYNC_G and rst = RST_POLARITY_G) then + r <= REG_INIT_C after TPD_G; + elsif rising_edge(clk) then + r <= rin after TPD_G; + end if; + end process seq; + +end architecture rtl; diff --git a/ethernet/RoCEv2/rtl/RoCEv2RateIncProc.vhd b/ethernet/RoCEv2/rtl/RoCEv2RateIncProc.vhd new file mode 100644 index 0000000000..883689c969 --- /dev/null +++ b/ethernet/RoCEv2/rtl/RoCEv2RateIncProc.vhd @@ -0,0 +1,176 @@ +------------------------------------------------------------------------------- +-- Company : SLAC National Accelerator Laboratory +------------------------------------------------------------------------------- +-- Description: Rate increment process +------------------------------------------------------------------------------- +-- This file is part of 'SLAC Firmware Standard Library'. +-- It is subject to the license terms in the LICENSE.txt file found in the +-- top-level directory of this distribution and at: +-- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. +-- No part of 'SLAC Firmware Standard Library', including this file, +-- may be copied, modified, propagated, or distributed except according to +-- the terms contained in the LICENSE.txt file. +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +library surf; +use surf.StdRtlPkg.all; + +entity RoCEv2RateIncProc is + generic ( + TPD_G : time := 1 ns; + LINE_RATE_G : integer := 1_250_000_000; -- 1.25 GB/s = 10 Gb/s + RST_ASYNC_G : boolean := false; + RST_POLARITY_G : sl := '1' + ); + port ( + clk : in sl; + rst : in sl; + -- Flags + start : in sl; + rstTimers : in sl; + rateIncInterval : in slv(31 downto 0); + Rai : in slv(31 downto 0); + Rhai : in slv(31 downto 0); + curRc : in slv(31 downto 0); + curRt : in slv(31 downto 0); + timeStageThreshold : in slv(7 downto 0); + -- Outputs + timeStage : out slv(7 downto 0); + newRc : out slv(31 downto 0); + newRt : out slv(31 downto 0); + valid : out sl + ); +end entity RoCEv2RateIncProc; + +architecture rtl of RoCEv2RateIncProc is + + type StateType is ( + IDLE_S, + COUNTING_S, + FAST_REC_S, + ADDITIVE_INC_S, + HYPER_INC_S); + + type RegType is record + timer : slv(31 downto 0); + timeStage : slv(7 downto 0); + newRc : slv(31 downto 0); + newRt : slv(31 downto 0); + valid : sl; + state : StateType; + end record RegType; + + constant LINE_RATE_SLV_C : slv(31 downto 0) := toSlv(LINE_RATE_G, 32); + + constant REG_INIT_C : RegType := ( + timer => (others => '0'), + timeStage => (others => '0'), + newRc => (others => '0'), + newRt => (others => '0'), + valid => '0', + state => IDLE_S); + + signal r : RegType := REG_INIT_C; + signal rin : RegType; + +begin -- architecture rtl + + comb : process (Rai, Rhai, curRc, curRt, r, rateIncInterval, rst, rstTimers, + start, timeStageThreshold) is + variable v : RegType; + begin -- process comb + -- Latch the current value + v := r; + -- Reset flags + v.valid := '0'; + -- FSM + case r.state is + ------------------------------------------------------------------------- + when IDLE_S => + v.timer := (others => '0'); + if start = '1' then + v.state := COUNTING_S; + end if; + ----------------------------------------------------------------------- + when COUNTING_S => + v.timer := r.timer + 1; + if r.timer > rateIncInterval then + if r.timeStage < timeStageThreshold - 1 then + v.state := FAST_REC_S; + elsif r.timeStage = timeStageThreshold - 1 then + v.state := ADDITIVE_INC_S; + else + v.state := HYPER_INC_S; + end if; + else + if rstTimers = '1' then + v.timer := (others => '0'); + v.timeStage := (others => '0'); + end if; + end if; + ----------------------------------------------------------------------- + when FAST_REC_S => + -- v.newRc := (curRc srl 1) + (curRt srl 1); -- Rc = Rc/2+Rt/2 + v.newRc := ('0' & curRc(31 downto 1)) + ('0' & curRt(31 downto 1)); -- Rc = Rc/2 + Rt/2 + v.newRt := curRt; + v.valid := '1'; + v.timeStage := r.timeStage + 1; + v.timer := (others => '0'); + v.state := COUNTING_S; + ----------------------------------------------------------------------- + when ADDITIVE_INC_S => + v.newRt := curRt + Rai; + if v.newRt > LINE_RATE_SLV_C then + v.newRt := LINE_RATE_SLV_C; + end if; + -- v.newRc := (curRc srl 1) + (v.newRt srl 1); + v.newRc := ('0' & curRc(31 downto 1)) + ('0' & v.newRt(31 downto 1)); + v.valid := '1'; + v.timeStage := r.timeStage + 1; + v.timer := (others => '0'); + v.state := COUNTING_S; + ----------------------------------------------------------------------- + when HYPER_INC_S => + v.newRt := curRt + Rhai; + if v.newRt > LINE_RATE_SLV_C then + v.newRt := LINE_RATE_SLV_C; + end if; + -- v.newRc := (curRc srl 1) + (v.newRt srl 1); + v.newRc := ('0' & curRc(31 downto 1)) + ('0' & v.newRt(31 downto 1)); + v.valid := '1'; + v.timer := (others => '0'); + v.state := COUNTING_S; + ----------------------------------------------------------------------- + end case; + + -- Outputs + newRc <= r.newRc; + newRt <= r.newRt; + valid <= r.valid; + timeStage <= r.timeStage; + + -- Reset + if (RST_ASYNC_G = false and rst = RST_POLARITY_G) then + v := REG_INIT_C; + end if; + + -- Register update + rin <= v; + + end process comb; + + seq : process (clk, rst) is + begin + if (RST_ASYNC_G and rst = RST_POLARITY_G) then + r <= REG_INIT_C after TPD_G; + elsif rising_edge(clk) then + r <= rin after TPD_G; + end if; + end process seq; + +end architecture rtl; diff --git a/ethernet/RoCEv2/rtl/RoCEv2TokenBucket.vhd b/ethernet/RoCEv2/rtl/RoCEv2TokenBucket.vhd new file mode 100644 index 0000000000..00cc6c9204 --- /dev/null +++ b/ethernet/RoCEv2/rtl/RoCEv2TokenBucket.vhd @@ -0,0 +1,174 @@ +------------------------------------------------------------------------------- +-- Company : SLAC National Accelerator Laboratory +------------------------------------------------------------------------------- +-- Description: Simulation Testbed for testing the EthMac module +------------------------------------------------------------------------------- +-- This file is part of 'SLAC Firmware Standard Library'. +-- It is subject to the license terms in the LICENSE.txt file found in the +-- top-level directory of this distribution and at: +-- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. +-- No part of 'SLAC Firmware Standard Library', including this file, +-- may be copied, modified, propagated, or distributed except according to +-- the terms contained in the LICENSE.txt file. +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +library surf; +use surf.StdRtlPkg.all; +use surf.AxiStreamPkg.all; +use surf.SsiPkg.all; + +entity RoCEv2TokenBucket is + generic ( + TPD_G : time := 1 ns; + CLK_FREQ_G : real := 156.25E+6; + FRAC_BITS_G : natural := 16; + AXIS_CONFIG_G : AxiStreamConfigType + ); + port ( + axisClk : in sl; + axisRst : in sl; + sAxisMaster : in AxiStreamMasterType; + sAxisSlave : out AxiStreamSlaveType; + Rc : in slv(31 downto 0); + mAxisMaster : out AxiStreamMasterType; + mAxisSlave : in AxiStreamSlaveType + ); +end entity RoCEv2TokenBucket; + +architecture rtl of RoCEv2TokenBucket is + + constant CLK_PERIOD_C : real := 1.0/CLK_FREQ_G; -- seconds + + signal s_sAxisSlave : AxiStreamSlaveType; + signal frameUpdate : sl; + signal frameCnt : slv(63 downto 0); + signal frameSize : slv(31 downto 0); + signal frameSizeSync : slv(31 downto 0); + signal frameRate : slv(31 downto 0); + signal bandwidth : slv(63 downto 0); + signal rd_en : sl; + signal axisMasterFifo : AxiStreamMasterType; + signal axisSlaveFifo : AxiStreamSlaveType; + signal byte_per_clk : slv(31 downto 0); -- Should be parametrized + +begin -- architecture rtl + + sAxisSlave <= s_sAxisSlave; + + AxiStreamMon_1 : entity surf.AxiStreamMon + generic map ( + TPD_G => TPD_G, + COMMON_CLK_G => true, + AXIS_CLK_FREQ_G => CLK_FREQ_G, + AXIS_CONFIG_G => AXIS_CONFIG_G) + port map ( + axisClk => axisClk, + axisRst => axisRst, + axisMaster => saxisMaster, + axisSlave => s_sAxisSlave, + statusClk => axisClk, + statusRst => axisRst, + frameUpdate => frameUpdate, + frameCnt => frameCnt, + frameSize => frameSize, + frameRate => frameRate, + bandwidth => bandwidth + ); + + ----------------------------------------------------------------------------- + -- Data FIFO + ----------------------------------------------------------------------------- + AxiStreamFifoV2_1 : entity surf.AxiStreamFifoV2 + generic map ( + TPD_G => TPD_G, + PIPE_STAGES_G => 8, + VALID_THOLD_G => 0, + GEN_SYNC_FIFO_G => true, + FIFO_ADDR_WIDTH_G => 12, + FIFO_FIXED_THRESH_G => true, + FIFO_PAUSE_THRESH_G => 1, + INT_DATA_WIDTH_G => 16, + SLAVE_AXI_CONFIG_G => AXIS_CONFIG_G, + MASTER_AXI_CONFIG_G => AXIS_CONFIG_G) + port map ( + sAxisClk => axisClk, + sAxisRst => axisRst, + sAxisMaster => sAxisMaster, + sAxisSlave => s_sAxisSlave, + mAxisClk => axisClk, + mAxisRst => axisRst, + mAxisMaster => axisMasterFifo, + mAxisSlave => axisSlaveFifo + ); + + ----------------------------------------------------------------------------- + -- Data Size FIFO + ----------------------------------------------------------------------------- + FifoSync_1 : entity surf.FifoSync + generic map ( + TPD_G => TPD_G, + FWFT_EN_G => true, + PIPE_STAGES_G => 0, + DATA_WIDTH_G => 32, + ADDR_WIDTH_G => 6) + port map ( + rst => axisRst, + clk => axisClk, + wr_en => frameUpdate, + rd_en => rd_en, + din => frameSize, + dout => frameSizeSync, + data_count => open, + wr_ack => open, + valid => open, + overflow => open, + underflow => open, + prog_full => open, + prog_empty => open, + almost_full => open, + almost_empty => open, + full => open, + not_full => open, + empty => open + ); + + ----------------------------------------------------------------------------- + -- Token Bucket + ----------------------------------------------------------------------------- + AxisBucket_1 : entity surf.RoCEv2AxisBucket + generic map ( + TPD_G => TPD_G, + FRAC_BITS_G => FRAC_BITS_G, -- frac bits for byte per clk + BUCKET_SIZE_G => x"00100000", -- in byte + AXIS_CONFIG_G => AXIS_CONFIG_G) + port map ( + axisClk => axisClk, + axisRst => axisRst, + byte_per_clk => byte_per_clk, -- Q16.16 + packet_size => frameSizeSync, + rd_en => rd_en, + sAxisMaster => axisMasterFifo, + sAxisSlave => axisSlaveFifo, + mAxisMaster => mAxisMaster, + mAxisSlave => mAxisSlave); + + ----------------------------------------------------------------------------- + -- Token Calculator + ----------------------------------------------------------------------------- + tokenCalc_1 : entity surf.RoCEv2TokenCalc + generic map ( + TPD_G => TPD_G, + CLK_FREQ_G => CLK_FREQ_G, + FRAC_BITS_G => FRAC_BITS_G) + port map ( + clk => axisClk, + rst => axisRst, + Rc => Rc, + byte_per_clk => byte_per_clk); + +end architecture rtl; diff --git a/ethernet/RoCEv2/rtl/RoCEv2TokenCalc.vhd b/ethernet/RoCEv2/rtl/RoCEv2TokenCalc.vhd new file mode 100644 index 0000000000..89aed70265 --- /dev/null +++ b/ethernet/RoCEv2/rtl/RoCEv2TokenCalc.vhd @@ -0,0 +1,69 @@ +------------------------------------------------------------------------------- +-- Company : SLAC National Accelerator Laboratory +------------------------------------------------------------------------------- +-- Description: Token calculator. Tokens = Rc * 2^16 / f_clk. To ease the +-- division we approximate 2^16 / f_clk = K / 2^N so that tokens = Rc * K / +-- 2^N. So if N=32 we would have K = round(2^{32+16} / f_clk) = round(2^48 / +-- f_clk) so then we can do tokens = (Rc * K) >> 32 +------------------------------------------------------------------------------- +-- This file is part of 'SLAC Firmware Standard Library'. +-- It is subject to the license terms in the LICENSE.txt file found in the +-- top-level directory of this distribution and at: +-- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. +-- No part of 'SLAC Firmware Standard Library', including this file, +-- may be copied, modified, propagated, or distributed except according to +-- the terms contained in the LICENSE.txt file. +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; +use ieee.math_real.all; + +library surf; +use surf.StdRtlPkg.all; +use surf.AxiStreamPkg.all; +use surf.SsiPkg.all; + +entity RoCEv2TokenCalc is + generic ( + TPD_G : time := 1 ns; + CLK_FREQ_G : real := 156.25E+6; + FRAC_BITS_G : natural := 16 + ); + port ( + clk : in sl; + rst : in sl; + Rc : in slv(31 downto 0); + byte_per_clk : out slv(15 + FRAC_BITS_G downto 0) + ); +end entity RoCEv2TokenCalc; + +architecture rtl of RoCEv2TokenCalc is + + function calc_k(n_bits : positive; f_hz : natural; frac_bits : natural) return slv is + variable kInt : integer; + begin + kInt := integer(exp(real(n_bits + frac_bits) * log(2.0)) / real(f_hz)); + return conv_std_logic_vector(kInt, 32); + end function; + + constant N_C : natural := 48 - FRAC_BITS_G; + constant CLK_PERIOD_C : real := 1.0/CLK_FREQ_G; -- seconds + constant CLK_FREQ_INTEGER_C : natural := getTimeRatio(1.0, CLK_PERIOD_C); + constant K_C : slv(31 downto 0) := calc_k(N_C, CLK_FREQ_INTEGER_C, FRAC_BITS_G); + + signal prob : slv(63 downto 0); + +begin -- architecture rtl + + seq : process (clk) is + begin -- process seq + if rising_edge(clk) then -- rising clock edge + prob <= Rc * K_C; + byte_per_clk <= prob(63 downto N_C); + end if; + end process seq; + +end architecture rtl; diff --git a/ethernet/RoCEv2/wrappers/EthMacRxRoCEv2Wrapper.vhd b/ethernet/RoCEv2/wrappers/EthMacRxRoCEv2Wrapper.vhd index e509b0a6a3..5839e7edfd 100644 --- a/ethernet/RoCEv2/wrappers/EthMacRxRoCEv2Wrapper.vhd +++ b/ethernet/RoCEv2/wrappers/EthMacRxRoCEv2Wrapper.vhd @@ -1,7 +1,7 @@ ------------------------------------------------------------------------------- -- Company : SLAC National Accelerator Laboratory ------------------------------------------------------------------------------- --- Description: Cocotb-facing wrapper for EthMacRxRoCEv2 +-- Description: Cocotb-facing wrapper for RoCEv2EthMacRx ------------------------------------------------------------------------------- -- This file is part of 'SLAC Firmware Standard Library'. -- It is subject to the license terms in the LICENSE.txt file found in the @@ -92,7 +92,7 @@ begin ---------------------------------------------------------------------------- -- DUT hookup ---------------------------------------------------------------------------- - U_DUT : entity surf.EthMacRxRoCEv2 + U_DUT : entity surf.RoCEv2EthMacRx generic map ( TPD_G => TPD_G, RST_POLARITY_G => RST_POLARITY_G) diff --git a/ethernet/UdpEngine/rtl/UdpEngineWrapper.vhd b/ethernet/UdpEngine/rtl/UdpEngineWrapper.vhd index 4313f19d21..fed6d377ed 100755 --- a/ethernet/UdpEngine/rtl/UdpEngineWrapper.vhd +++ b/ethernet/UdpEngine/rtl/UdpEngineWrapper.vhd @@ -44,6 +44,8 @@ entity UdpEngineWrapper is IGMP_GRP_SIZE : positive range 1 to 8 := 1; IGMP_INIT_G : Slv32Array := (0 => x"0000_0000"); CLK_FREQ_G : real := 156.25E+06; -- In units of Hz + DSCP_G : natural range 0 to 63 := 0; + ECN_G : slv(1 downto 0) := "00"; COMM_TIMEOUT_G : positive := 30; -- In units of seconds, Client's Communication timeout before re-ARPing or DHCP discover/request TTL_G : slv(7 downto 0) := x"20"; -- IPv4's Time-To-Live (TTL) SYNTH_MODE_G : string := "inferred"); -- Synthesis mode for internal RAMs @@ -135,6 +137,8 @@ begin PROTOCOL_G => (0 => UDP_C), CLIENT_SIZE_G => CLIENT_SIZE_G, CLK_FREQ_G => CLK_FREQ_G, + DSCP_G => DSCP_G, + ECN_G => ECN_G, IGMP_G => IGMP_G, IGMP_GRP_SIZE => IGMP_GRP_SIZE, TTL_G => TTL_G) diff --git a/python/surf/ethernet/roce/_RoCEv2Dcqcn.py b/python/surf/ethernet/roce/_RoCEv2Dcqcn.py new file mode 100644 index 0000000000..7954e94027 --- /dev/null +++ b/python/surf/ethernet/roce/_RoCEv2Dcqcn.py @@ -0,0 +1,281 @@ +#----------------------------------------------------------------------------- +# This file is part of the 'SLAC Firmware Standard Library'. It is subject to +# the license terms in the LICENSE.txt file found in the top-level directory +# of this distribution and at: +# https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. +# No part of the 'SLAC Firmware Standard Library', including this file, may be +# copied, modified, propagated, or distributed except according to the terms +# contained in the LICENSE.txt file. +#----------------------------------------------------------------------------- + +import pyrogue as pr + +# DCQCN parameters +class RoCEv2Dcqcn(pr.Device): + def __init__(self, clockPeriodNs=6.4, **kwargs): + super().__init__(**kwargs) + + self._clockPeriodNs = clockPeriodNs + + # ------------------------- + # 0x000 - alphaG, dec_gain, timeStageThreshold, clampTgtRate + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'AlphaG', + description = '(1-g) factor for alpha update, Q0.10 fixed-point', + offset = 0x000, + bitSize = 10, + bitOffset = 0, + mode = 'RW', + base = pr.UInt, + )) + + self.add(pr.LinkVariable( + name = 'AlphaG_real', + description = '(1-g) as a floating-point value in [0, 1)', + mode = 'RW', + units = '', + linkedGet = lambda: self.AlphaG.value() / 1024.0, + linkedSet = lambda value, write: self.AlphaG.set(int(round(value * 1024.0)), write=write), + dependencies = [self.AlphaG], + )) + + self.add(pr.LinkVariable( + name = 'G_real', + description = 'g factor for alpha update, floating-point value in (0, 1]', + mode = 'RW', + units = '', + hidden = True, + linkedGet = lambda: 1.0 - self.AlphaG.value() / 1024.0, + linkedSet = lambda value, write: self.AlphaG.set(int(round((1.0 - value) * 1024.0)), write=write), + dependencies = [self.AlphaG], + )) + + self.add(pr.RemoteVariable( + name = 'DecGain', + description = 'Decrease gain exponent: Rc = Rc * (1 - alpha / 2^DecGain)', + offset = 0x000, + bitSize = 4, + bitOffset = 10, + mode = 'RW', + base = pr.UInt, + )) + + self.add(pr.RemoteVariable( + name = 'TimeStageThreshold', + description = 'Threshold (in increase stages) before transitioning to next increase stage', + offset = 0x000, + bitSize = 8, + bitOffset = 14, + mode = 'RW', + base = pr.UInt, + units = 'stages', + )) + + self.add(pr.RemoteVariable( + name = 'ClampTgtRate', + description = 'Clamp target rate step: 0 = disabled, 1 = enabled', + offset = 0x000, + bitSize = 1, + bitOffset = 22, + mode = 'RW', + base = pr.UInt, + enum = {0: 'Disabled', 1: 'Enabled'}, + )) + + # ------------------------- + # 0x004 - Rai + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'Rai', + description = 'Additive increase step', + offset = 0x004, + bitSize = 32, + bitOffset = 0, + mode = 'RW', + base = pr.Int, + units = 'Byte/s', + )) + + # ------------------------- + # 0x008 - Rhai + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'Rhai', + description = 'Hyper-active increase step', + offset = 0x008, + bitSize = 32, + bitOffset = 0, + mode = 'RW', + base = pr.Int, + units = 'Byte/s', + )) + + # ------------------------- + # 0x00C - Rmin + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'Rmin', + description = 'Minimum rate floor', + offset = 0x00C, + bitSize = 32, + bitOffset = 0, + mode = 'RW', + base = pr.Int, + units = 'Byte/s', + )) + + # ------------------------- + # 0x010 - rateIncInterval + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'RateIncInterval', + description = 'Rate increase timer interval in clock cycles', + offset = 0x010, + bitSize = 32, + bitOffset = 0, + mode = 'RW', + base = pr.UInt, + units = 'cycles', + )) + + self.add(pr.LinkVariable( + name = 'RateIncInterval_ns', + description = 'Rate increase timer interval in nanoseconds', + mode = 'RW', + units = 'ns', + linkedGet = lambda: self.RateIncInterval.value() * self._clockPeriodNs, + linkedSet = lambda value, write: self.RateIncInterval.set( + int(round(value / self._clockPeriodNs)), write=write), + dependencies = [self.RateIncInterval], + )) + + # ------------------------- + # 0x014 - rateDecInterval [15:0], alphaUpdInterval [31:16] + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'RateDecInterval', + description = 'Rate decrease timer interval in clock cycles', + offset = 0x014, + bitSize = 16, + bitOffset = 0, + mode = 'RW', + base = pr.UInt, + units = 'cycles', + )) + + self.add(pr.LinkVariable( + name = 'RateDecInterval_ns', + description = 'Rate decrease timer interval in nanoseconds', + mode = 'RW', + units = 'ns', + linkedGet = lambda: self.RateDecInterval.value() * self._clockPeriodNs, + linkedSet = lambda value, write: self.RateDecInterval.set( + int(round(value / self._clockPeriodNs)), write=write), + dependencies = [self.RateDecInterval], + )) + + self.add(pr.RemoteVariable( + name = 'AlphaUpdInterval', + description = 'Alpha update timer interval in clock cycles', + offset = 0x014, + bitSize = 16, + bitOffset = 16, + mode = 'RW', + base = pr.UInt, + units = 'cycles', + )) + + self.add(pr.LinkVariable( + name = 'AlphaUpdInterval_ns', + description = 'Alpha update timer interval in nanoseconds', + mode = 'RW', + units = 'ns', + linkedGet = lambda: self.AlphaUpdInterval.value() * self._clockPeriodNs, + linkedSet = lambda value, write: self.AlphaUpdInterval.set( + int(round(value / self._clockPeriodNs)), write=write), + dependencies = [self.AlphaUpdInterval], + )) + + # ------------------------- + # 0x018 - Rc (read-only) + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'Rc', + description = 'Current transmission rate', + offset = 0x018, + bitSize = 32, + bitOffset = 0, + mode = 'RO', + base = pr.Int, + units = 'Byte/s', + pollInterval = 1, + )) + + # ------------------------- + # 0x01C - Rt (read-only) + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'Rt', + description = 'Target transmission rate', + offset = 0x01C, + bitSize = 32, + bitOffset = 0, + mode = 'RO', + base = pr.Int, + units = 'Byte/s', + pollInterval = 1, + )) + + # ------------------------- + # 0x020 - alpha (read-only) + # ------------------------- + + self.add(pr.RemoteVariable( + name = 'Alpha', + description = 'Current alpha value, Q0.10 fixed-point', + offset = 0x020, + bitSize = 10, + bitOffset = 0, + mode = 'RO', + base = pr.UInt, + pollInterval = 1, + )) + + self.add(pr.LinkVariable( + name = 'Alpha_real', + description = 'Current alpha as a floating-point value in [0, 1]', + mode = 'RO', + units = '', + linkedGet = lambda: self.Alpha.value() / 1024.0, + dependencies = [self.Alpha], + )) + + self.add(pr.RemoteVariable( + name = 'CnpCounterReset', + description = 'Soft reset for the received CNP rollover counter (write 1 to clear CnpCounter)', + offset = 0x020, + bitSize = 1, + bitOffset = 10, + mode = 'RW', + pollInterval = 1, + )) + + self.add(pr.RemoteVariable( + name = 'CnpCounter', + description = 'Number of received Congestion Notification Packets (rolls over; cleared by CnpCounterReset)', + offset = 0x020, + bitSize = 16, + bitOffset = 11, + mode = 'RO', + base = pr.Int, + pollInterval = 1, + )) diff --git a/python/surf/ethernet/roce/_RoceEngine.py b/python/surf/ethernet/roce/_RoCEv2Engine.py similarity index 86% rename from python/surf/ethernet/roce/_RoceEngine.py rename to python/surf/ethernet/roce/_RoCEv2Engine.py index 9ad9a74f32..ea281f2cfe 100644 --- a/python/surf/ethernet/roce/_RoceEngine.py +++ b/python/surf/ethernet/roce/_RoCEv2Engine.py @@ -10,8 +10,11 @@ import pyrogue as pr -class RoceEngine(pr.Device): +from surf.ethernet.roce._RoCEv2Dcqcn import RoCEv2Dcqcn + +class RoCEv2Engine(pr.Device): def __init__( self, + dcqcn = True, **kwargs): super().__init__(**kwargs) @@ -48,3 +51,10 @@ def __init__( self, bitSize = 276, mode = 'RO', )) + + if dcqcn: + self.add(RoCEv2Dcqcn( + name = "Dcqcn", + offset = 0x1000, + expand = False, + )) diff --git a/python/surf/ethernet/roce/__init__.py b/python/surf/ethernet/roce/__init__.py index f5209a15ec..8576baac1d 100644 --- a/python/surf/ethernet/roce/__init__.py +++ b/python/surf/ethernet/roce/__init__.py @@ -7,4 +7,5 @@ ## may be copied, modified, propagated, or distributed except according to ## the terms contained in the LICENSE.txt file. ############################################################################## -from surf.ethernet.roce._RoceEngine import * +from surf.ethernet.roce._RoCEv2Dcqcn import * +from surf.ethernet.roce._RoCEv2Engine import * diff --git a/tests/axi/axi_stream/test_AxiStreamCompact.py b/tests/axi/axi_stream/test_AxiStreamCompact.py index a29b593dae..8a7ba0d7cc 100644 --- a/tests/axi/axi_stream/test_AxiStreamCompact.py +++ b/tests/axi/axi_stream/test_AxiStreamCompact.py @@ -12,11 +12,9 @@ # - Sweep: Keep one stable same-width wrapper case. # - Stimulus: Drive one contiguous full-keep beat directly into the flat slave # port and hold the master ready high. -# - Checks: The accepted output beat must preserve the full-byte keep mask and -# terminate with `tLast`. -# - Timing: The beat is driven through the real compact datapath, but the -# bench samples only the stable payload handshake fields under the current -# simulator stack. +# - Checks: A full-keep beat passes straight through, so the output beat must +# preserve the payload data and full-byte keep mask and terminate with +# `tLast`. import cocotb import pytest @@ -86,7 +84,7 @@ async def contiguous_full_keep_test(dut): await tb.reset() await tb.drive_beat(data=0x44332211, keep=0xF, last=1) await tb.cycle(2) - assert tb.rx_beats == [(0, 0xF, 1)] + assert tb.rx_beats == [(0x44332211, 0xF, 1)] @pytest.mark.parametrize("parameters", [pytest.param({}, id="contiguous_same_width")]) diff --git a/tests/ethernet/EthMacCore/ethmac_test_utils.py b/tests/ethernet/EthMacCore/ethmac_test_utils.py index 0b6cb9ae55..d556721070 100644 --- a/tests/ethernet/EthMacCore/ethmac_test_utils.py +++ b/tests/ethernet/EthMacCore/ethmac_test_utils.py @@ -32,11 +32,11 @@ ROCE_RTL_ROOT = Path(__file__).resolve().parents[3] / "ethernet" / "RoCEv2" / "rtl" ROCE_ANALYSIS_SOURCES = [ - str(ROCE_RTL_ROOT / "RocePkg.vhd"), + str(ROCE_RTL_ROOT / "RoCEv2Pkg.vhd"), *( str(path) for path in sorted(ROCE_RTL_ROOT.glob("*.vhd")) - if path.name != "RocePkg.vhd" + if path.name != "RoCEv2Pkg.vhd" ), ] diff --git a/tests/ethernet/RoCEv2/roce_test_utils.py b/tests/ethernet/RoCEv2/roce_test_utils.py index 1198cd91b4..8fb40a1779 100644 --- a/tests/ethernet/RoCEv2/roce_test_utils.py +++ b/tests/ethernet/RoCEv2/roce_test_utils.py @@ -16,7 +16,7 @@ ROCE_RTL_ROOT = Path(__file__).resolve().parents[3] / "ethernet" / "RoCEv2" / "rtl" -ROCE_PKG_SOURCE = str(ROCE_RTL_ROOT / "RocePkg.vhd") +ROCE_PKG_SOURCE = str(ROCE_RTL_ROOT / "RoCEv2Pkg.vhd") def roce_rtl_sources(*filenames: str) -> list[str]: @@ -29,7 +29,7 @@ def roce_rtl_sources(*filenames: str) -> list[str]: *( path.name for path in sorted(ROCE_RTL_ROOT.glob("*.vhd")) - if path.name != "RocePkg.vhd" + if path.name != "RoCEv2Pkg.vhd" ) )