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Backend deadlocks on misaligned multi-burst transfers with decouple_rw=1 #115

Description

@DanielKellerM

Summary

The backend (AXI-write variants: rw_axi, r_obi_w_axi, rw_axi_rw_axis, …) deadlocks for certain address/length combinations when decouple_rw=1. The transfer is accepted (req handshake completes) but never finishes — a channel goes idle permanently and the stream watchdog fires. The same transfer with decouple_rw=0 passes cleanly.

Trigger

  • Misaligned src and dst addresses, and
  • length > max_len so the legalizer splits into multiple bursts, and
  • decouple_rw=1.

The read-side and write-side burst decompositions diverge (page-boundary splits differ for src vs dst), and the channel coupler gates AW emission on the read response rather than the write data — creating a circular dependency on the write path.

Minimal reproduction (directed TB, no UVM)

tb_idma_backend_rw_axi with a single transfer:

field value
length 1958
src_addr 0x0006e76a
dst_addr 0x001f9c03
src/dst_protocol 0 (AXI)
max_src/dst_len 64
aw_decoupled 0
rw_decoupled 1

Result: AXI watchdog fires after ~100 cycles of inactivity. With rw_decoupled=0: passes. Full characterization in doc/TODO-rw-decoupled-deadlock.md.

Fix

PR #80 re-gates the channel coupler's AW release on the write data path instead of the read response. Verified locally to fix the deadlock and pass the full {decouple_rw, decouple_aw} matrix (16/16) across rw_axi, r_obi_w_axi, r_axi_w_obi, rw_axi_rw_axis with no regressions.

Status

Until PR #80 lands, the affected nonfree CI sim jobs (vsim-uvm-sim, xrun-uvm-sim, vsim-sim-random) are marked allow_failure so this known bug is flagged (orange) rather than gating.

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