From f4dbf7106d05b3704db3fd942e7d0c0ea47df301 Mon Sep 17 00:00:00 2001
From: Saurish <saurishsum10@outlook.com>
Date: Tue, 7 Jul 2026 03:57:38 -0700
Subject: [PATCH] Add MSVC support for bit manipulation function in CUDA code

---
 ...RasterizeToPixelsFromWorld3DGSParallelBatchBwd.cu | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/gsplat/cuda/csrc/RasterizeToPixelsFromWorld3DGSParallelBatchBwd.cu b/gsplat/cuda/csrc/RasterizeToPixelsFromWorld3DGSParallelBatchBwd.cu
index abbbe6eef..591dd1350 100644
--- a/gsplat/cuda/csrc/RasterizeToPixelsFromWorld3DGSParallelBatchBwd.cu
+++ b/gsplat/cuda/csrc/RasterizeToPixelsFromWorld3DGSParallelBatchBwd.cu
@@ -20,6 +20,10 @@
 
 #if GSPLAT_BUILD_3DGUT
 
+#if defined(_MSC_VER)
+#include <intrin.h>
+#endif
+
 #include <ATen/Dispatch.h>
 #include <ATen/Functions.h>
 #include <ATen/core/Tensor.h>
@@ -186,7 +190,15 @@ uint32_t ceil_log2_u64(uint64_t x) {
     if (x <= 1) {
         return 0;
     }
+
+#if defined(_MSC_VER)
+    unsigned long index;
+    _BitScanReverse64(&index, x - 1);
+    return static_cast<uint32_t>(index) + 1u;
+#else
     return 64u - static_cast<uint32_t>(__builtin_clzll(x - 1));
+#endif
+
 }
 
 } // namespace