@@ -196,12 +196,12 @@ void main(uint ID : SV_GroupID) {
196196 // CHECK-SAME: ; LinAlgMatVecMulAdd(matrix,isOutputSigned,inputVector,inputInterpretation,biasVector,biasInterpretation)
197197 vector <half , 7 > vec24 = MultiplyAdd<half >(Mat_7_15_Packed, interpVecH15Packed, memBias7Packed);
198198
199- // CHECK: call void @dx.op.linAlgVectorAccumulateToDescriptor.v4f16(i32 -2147483617, <4 x half>
200- // CHECK-SAME: <half 0xH4926, half 0xH4926, half 0xH4926, half 0xH4926>, %dx.types.Handle %{{[0-9]+}}, i32 0, i32 64 )
201- // CHECK-SAME: ; LinAlgVectorAccumulateToDescriptor(vector, handle,offset,align)
202- InterlockedAccumulate (vec1, RWBAB, 0 );
203-
204- // CHECK: call void @dx.op.linAlgVectorAccumulateToDescriptor.v8f16(i32 -2147483617, <8 x half> %{{[0-9]+}},
205- // CHECK-SAME: %dx.types.Handle %{{[0-9]+}}, i32 8, i32 64 ) ; LinAlgVectorAccumulateToDescriptor(vector, handle,offset,align)
206- InterlockedAccumulate (vec2, RWBAB, 8 );
199+ // CHECK: call void @dx.op.linAlgVectorAccumulateToDescriptor.v4f16(i32 -2147483617, %dx.types.Handle %{{[0-9]+}},
200+ // CHECK-SAME: i32 0, i32 64, <4 x half> <half 0xH4926, half 0xH4926, half 0xH4926, half 0xH4926> )
201+ // CHECK-SAME: ; LinAlgVectorAccumulateToDescriptor(handle,offset,align,vector )
202+ InterlockedAccumulate (RWBAB, 0 , vec1 );
203+
204+ // CHECK: call void @dx.op.linAlgVectorAccumulateToDescriptor.v8f16(i32 -2147483617, %dx.types.Handle %{{[0-9]+}},
205+ // CHECK-SAME: i32 8, i32 64, <8 x half> %{{[0-9]+}}) ; LinAlgVectorAccumulateToDescriptor(handle,offset,align,vector )
206+ InterlockedAccumulate (RWBAB, 8 , vec2 );
207207}
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