Merge pull request tock#4551 from tock/single-thread-value-atomics

kernel: add `SingleThreadValue` type for `!Sync` statics, using atomics for synchronization

Author: alevy

arch/cortex-m/src/lib.rs

@@ -16,6 +16,7 @@ pub mod scb;
 pub mod support;
 pub mod syscall;
 pub mod systick;
+pub mod thread_id;
 
 // These constants are defined in the linker script.
 extern "C" {

arch/cortex-m/src/support.rs

@@ -74,3 +74,34 @@ pub fn reset() -> ! {
         nop();
     }
 }
+
+/// Check if we are executing in an interrupt handler or not.
+///
+/// Returns `true` if the CPU is executing in an interrupt handler. Returns
+/// `false` if the chip is executing in thread mode.
+#[cfg(any(doc, all(target_arch = "arm", target_os = "none")))]
+pub fn is_interrupt_context() -> bool {
+    use core::arch::asm;
+    let mut interrupt_number: u32;
+
+    // # Safety
+    //
+    // This only reads a register and has no effects.
+    unsafe {
+        // IPSR[8:0] holds the currently active interrupt
+        asm!(
+            "mrs r0, ipsr",
+            out("r0") interrupt_number,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
+
+    // If IPSR[8:0] is 0 then we are in thread mode. Otherwise an interrupt has
+    // occurred and we are in some interrupt service routine.
+    (interrupt_number & 0x1FF) != 0
+}
+
+#[cfg(not(any(doc, all(target_arch = "arm", target_os = "none"))))]
+pub fn is_interrupt_context() -> bool {
+    unimplemented!()
+}

arch/cortex-m/src/thread_id.rs

@@ -0,0 +1,27 @@
+// Licensed under the Apache License, Version 2.0 or the MIT License.
+// SPDX-License-Identifier: Apache-2.0 OR MIT
+// Copyright Tock Contributors 2025.
+
+//! Basic implementation of a thread ID provider for Cortex-M.
+
+use kernel::platform::chip::ThreadIdProvider;
+
+/// Implement the [`ThreadIdProvider`] trait for Cortex-M platforms.
+///
+/// We assign thread IDs this way:
+///
+/// - 0: Main thread
+/// - 1: Any interrupt service routine
+pub enum CortexMThreadIdProvider {}
+
+// # Safety
+//
+// By implementing [`ThreadIdProvider`] we are guaranteeing that we correctly
+// return the thread ID. On single-core platforms the thread ID only depends on
+// whether execution is in an interrupt service routine or not, which is what
+// this implementation checks for.
+unsafe impl ThreadIdProvider for CortexMThreadIdProvider {
+    fn running_thread_id() -> usize {
+        crate::support::is_interrupt_context() as usize
+    }
+}

arch/cortex-m0/src/lib.rs

@@ -14,6 +14,7 @@ pub use cortexm::support;
 
 pub use cortexm::nvic;
 pub use cortexm::syscall;
+pub use cortexm::thread_id;
 
 #[cfg(any(doc, all(target_arch = "arm", target_os = "none")))]
 struct HardFaultStackedRegisters {

arch/cortex-m0p/src/lib.rs

@@ -30,6 +30,7 @@ pub use cortexm::interrupt_mask;
 pub use cortexm::nvic;
 pub use cortexm::scb;
 pub use cortexm::systick;
+pub use cortexm::thread_id;
 pub use cortexm::unhandled_interrupt;
 pub use cortexm::CortexMVariant;
 use cortexm0::CortexM0;

arch/cortex-m3/src/lib.rs

@@ -27,6 +27,7 @@ pub use cortexm::nvic;
 pub use cortexm::scb;
 pub use cortexm::support;
 pub use cortexm::systick;
+pub use cortexm::thread_id;
 pub use cortexm::unhandled_interrupt;
 pub use cortexm::CortexMVariant;
 

arch/cortex-m33/src/lib.rs

@@ -31,6 +31,7 @@ pub use cortexm::nvic;
 pub use cortexm::scb;
 pub use cortexm::support;
 pub use cortexm::systick;
+pub use cortexm::thread_id;
 pub use cortexm::unhandled_interrupt;
 pub use cortexm::CortexMVariant;
 

arch/cortex-m4/src/lib.rs

@@ -27,6 +27,7 @@ pub use cortexm::nvic;
 pub use cortexm::scb;
 pub use cortexm::support;
 pub use cortexm::systick;
+pub use cortexm::thread_id;
 pub use cortexm::unhandled_interrupt;
 pub use cortexm::CortexMVariant;
 

arch/cortex-m4f/src/lib.rs

@@ -27,6 +27,7 @@ pub use cortexm::nvic;
 pub use cortexm::scb;
 pub use cortexm::support;
 pub use cortexm::systick;
+pub use cortexm::thread_id;
 pub use cortexm::unhandled_interrupt;
 pub use cortexm::CortexMVariant;
 

arch/cortex-m7/src/lib.rs

@@ -26,6 +26,7 @@ pub use cortexm::nvic;
 pub use cortexm::scb;
 pub use cortexm::support;
 pub use cortexm::systick;
+pub use cortexm::thread_id;
 pub use cortexm::unhandled_interrupt;
 pub use cortexm::CortexMVariant;